[Coco] OS9 vs Flex

[John Kent]

On 2/01/2012 6:28 AM, John Kent wrote:
>
> Hi Darren,
>
> OK yes, I seem to recall someone mentioning that in the past.
> I think I had the schematic somewhere.
> I assume it had some sort of address counter on the bus.
>
> I thought the issue with the CoCo was that the memory was multiplexed 
> with the display during the E clock low cycle although there is 
> probably no reason why you can't halt the CPU. The CPU will tri-state 
> the address bus during E while the HALT and Bus Available signals are 
> asserted. I was wondering if it was possible to do read, modify, write 
> cycles using a video address generator on the address bus to modify 
> the video memory. The idea would be to perform vector line and circle 
> drawing and possibly memory fills directly on the display memory. If 
> the FDC can apply an a address to the CPU address bus while it is 
> halted, then it might be possible to do that.
>
> I was working on a FPGA 6844 DMA controller last night. I need to 
> implement some multi bus mastering logic to use it. DMA works in 
> continuous blocks, where as a Bressenham line generator would 
> increment and decrement by arbitrary amounts in both the X and Y 
> direction, and it would also need to understand the graphics mode the 
> video generator is working in to mask the appropriate pixels. You can 
> do it in an FPGA, but whether it would be practical on the original 
> hardware is another matter.
>
> John.
>

You'd have to use a CPLD, and that might not be big enough.

John.

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