[Coco] OS9 vs Flex

[John Kent]

On 2/01/2012 4:27 AM, Darren A wrote:
> On Sat, Dec 31, 2011 at 5:25 PM, John Kent wrote:
>> ....
>>
>> Has anyone interfaced high density 3.5" floppies to the CoCo ? Because you'd
>> be up for the same problem with those. The data rate would be too fast for a
>> 6809 software polling loop for the 1.44MB floppies. You'd need a floppy disk
>> controller with sector buffering for the CoCo.
>>
> The CoCo floppy controllers tie the WD17x3 DRQ line to the CPU's HALT
> input.  This makes it possible to do high density disk I/O on the CoCo
> at the normal 0.89 MHz speed (without polling).  I have done this
> using a modified 26-3029 controller.
>
> Darren
>
Hi Darren,

OK yes, I seem to recall someone mentioning that in the past.
I think I had the schematic somewhere.
I assume it had some sort of address counter on the bus.

I thought the issue with the CoCo was that the memory was multiplexed 
with the display during the E clock low cycle although there is probably 
no reason why you can't halt the CPU. The CPU will tri-state the address 
bus during E while the HALT and Bus Available signals are asserted. I 
was wondering if it was possible to do read, modify, write cycles using 
a video address generator on the address bus to modify the video memory. 
The idea would be to perform vector line and circle drawing and possibly 
memory fills directly on the display memory. If the FDC can apply an a 
address to the CPU address bus while it is halted, then it might be 
possible to do that.

I was working on a FPGA 6844 DMA controller last night. I need to 
implement some multi bus mastering logic to use it. DMA works in 
continuous blocks, where as a Bressenham line generator would increment 
and decrement by arbitrary amounts in both the X and Y direction, and it 
would also need to understand the graphics mode the video generator is 
working in to mask the appropriate pixels. You can do it in an FPGA, but 
whether it would be practical on the original hardware is another matter.

John.

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