[Coco] OS9 vs Flex

[Darren A]

On Sun, Jan 1, 2012 at 12:28 PM, John Kent wrote:
>
> On 2/01/2012 4:27 AM, Darren A wrote:
>>
>> The CoCo floppy controllers tie the WD17x3 DRQ line to the CPU's HALT
>> input.  This makes it possible to do high density disk I/O on the CoCo
>> at the normal 0.89 MHz speed (without polling).  I have done this
>> using a modified 26-3029 controller.
>>
>>
> Hi Darren,
>
> OK yes, I seem to recall someone mentioning that in the past.
> I think I had the schematic somewhere.
> I assume it had some sort of address counter on the bus.
>
> I thought the issue with the CoCo was that the memory was multiplexed with
> the display during the E clock low cycle although there is probably no
> reason why you can't halt the CPU. The CPU will tri-state the address bus
> during E while the HALT and Bus Available signals are asserted. I was
> wondering if it was possible to do read, modify, write cycles using a video
> address generator on the address bus to modify the video memory. The idea
> would be to perform vector line and circle drawing and possibly memory fills
> directly on the display memory. If the FDC can apply an a address to the CPU
> address bus while it is halted, then it might be possible to do that.
>

Hi John,

There is no address counter, and the FDC does not access the RAM.

The CPU executes code to enable the HALT line and then enters an
infinite loop to move data to or from the FDC. Since HALT is connected
to DRQ, the CPU only runs when the FDC requests a data transfer.  When
the operation is complete, the FDC asserts INTRQ which disables the
HALT line and generates an NMI to break out of the loop.

Darren