[Coco] 64K Coco mode and the MC6883

[RETRO Innovations]

OK, here's some of the results, though it is late, and if something 
looks wrong, it's probably how I am reading things.

The first sta $ffdf appears to be at $0197, which has S[2:0]=7, !WE is 
not active

followed by the sta $8000, which also has S=7, and !WE active during the 
second half of the cycle

sta $a000 also has s=7, !WE active on back half of cycle

sta $c000 also has s=7, !WE active on back half of cycle

Those do not match your table, which shows S=1,2,3

$01a4 is sta $ffde, S=7, no !WE

sta $8000 is S=1, no !WE

sta $a000 is S=2, no !WE

sta $c000 is S=3, no !WE,

S values match up with your table

Interesting that in RAM/ROM mode, a write to ROM segments is violating 
the bus, as the ROM and the CPU are both driving the bus.

Then sta $fffdf again at $01b0 to bring in RAM

lda $8000 is S=0, as is lda $a000 and lda $c000, which matches your table

If you'd like to have me test all the S values for each mode and each 
range of memory, feel free to send me another util and I'll run it.  The 
app need not read back data, just do a read and a write to each memory 
segment in RAM mode and then again in ROM mode.  If possible, though, do 
a sta $ff40 or something before beginning the test, because it makes it 
easier to trigger, since I can trigger on SCS line going low on the cart 
port.

 From what I see here, it should be doable to mirror RAM under ROM, but 
it will require a daughtercard for the SAM.  The extra logic would 
override S in RAM/ROM mode for $8000-$ff00 and synthesize a !WE signal 
during writes to those areas in RAM/ROM mode.  It's funny that the SAM 
actually appears to be doing too much work here, and should have just 
left the S=7 and the !WE active on writes to those areas in both maps.

Jim