[Coco] 6809 FPGA

Bill Nobel b_nobel at hotmail.com
Fri Sep 11 10:43:50 EDT 2015


I think you may be correct.  I do have the wires somewhat bundled on the ram grouped between address bus vs data by using a clip to separate the 2.  The noise is very faint and I can limit it by turning down the brightness till it is barely noticeable.  I am also going to try a different monitor as well.  The one I am currently using is quite old.  I have 5 different ones I can try.

Bill Nobel
 
> On Sep 11, 2015, at 8:21 AM, Dave Philipsen <dave at davebiz.com> wrote:
> 
> Bill, the only thing I could come up with on your noise problem is that you want to keep the wires between the FPGA and the DSUB VGA connector as short as possible.  They are unshielded and are carrying high frequency signals, high enough that they can start acting as antennas.  Also, don't forget that Gary had timing problems with his project and a newer RAM chip used on the DE1. That was a surface mount RAM chip installed on the board within millimeters of the FPGA.  When you start running things at frequencies above a few MHz lots of problems can start to surface. That's why I recommend running at the lower frequencies especially when you make a change and then bumping it back up to see if it works at higher frequencies.
> 
> Also, I was just thinking.  If your noise problem changes when you change the core frequency of the CPU remember that the VGA frequencies aren't changing so it probably has something to do with the wires you have running to your SRAM chip.  If you switch over to internal memory and remove those wires you may find that the problem goes away.  Another thing; it's possible that you're bringing the black level up into a range where your seeing some noise that would normally stay buried 'beneath the black'.  Does the black background on your monitor look a little to bright?
> 
> Dave
> 
> 
> On 9/11/2015 8:57 AM, Bill Nobel wrote:
>> Hi Neal thanks for the tips, and welcome to the group
>> 
>> I plan on trying the internal ram tonight when I get off work.  I haven’t tried wiring up the keyboard or the SD card yet, wanted to get life before I proceeded.  I have a few old PS/2 keyboards laying around.
>> 
>> Yes I do plan on migrating it to a Enhanced Coco3.  I have a release of Gary Beckers code for his FPGA project and I am patiently waiting to see if Roger is going to let his code out of the bag (hint, hint…).  Doing this project first to get myself up to speed on using Quartus and FPGA techniques.
>> 
>> I am still a little concerned about my noise issue on the vga, but I think it is related to the resistors on my VGA breakout board.  It uses 270ohm resistors on the RGB lines instead of Grants 670/470 ohm combo.  I tried playing with the timings in the controller, but it just got worse.
>> 
>> Bill Nobel
>> 
>>> On Sep 11, 2015, at 5:58 AM, Neal Crook <foofoobedoo at gmail.com> wrote:
>>> 
>>> Hi,
>>> my first post here but I thought I'd throw in a few debug comments based on
>>> my multicomp build
>>> 
>>> 1/ I would also advise configuring some internal RAM, for three reasons.
>>> First, it decouples you from wiring problems. Second, it decouples you from
>>> timing problems. Third, it makes your FPGA self-sufficient to the extent
>>> that you can run logic simulations in Quartus without the need for any
>>> additional testbench stuff. On my build, it took me more than a week to
>>> find that I had an address line short.. not on my breadboard (which I had
>>> buzzed out) but on the daughtercard PCB holding the FPGA (which I had
>>> assumed was good and so had not buzzed out).
>>> 
>>> 2/ The flashing cursor (and implicitly a "raster scan" or the non-CRT
>>> equivalent!) on the VGA is a strong indicator that lots of stuff is working.
>>> 
>>> 3/ Be warned that not all PS/2 keyboards will run on 3V3. Grant's design
>>> has a 3V3 supply and that did not work for me. I had to connect it to a 5V
>>> rail. You can and should still connect the pullups to 3V3.
>>> 
>>> 4/ With the kbd connected you should be able to tap the caps-lock and
>>> num-lock keys and see the kbd LEDs toggle. This is handled entirely in
>>> hardware. The keypress is a message from the kbd to the FPGA and the LED
>>> toggle is a message from the FPGA to the kbd, so if you can toggle the LEDs
>>> it shows another hunk of your FPGA and physical interconnect is OK.
>>> 
>>> Once you're all up and running, I assume you have a project beyond running
>>> Microsoft BASIC? You might like to check out my multicomp6809 github
>>> repository. The WIKI there describes hardware mods (coco-compatible memory
>>> mapper, timer interrupt, improved clock control) and software stuff (a
>>> debug monitor, a FORTH compiler with SD-card drivers, a FLEX port).
>>> 
>>> My current work-in-progress is a (level1) nitros09 port, but that's a
>>> subject for a separate post.
>>> 
>>> Neal.
>>> 
>>> -- 
>>> Coco mailing list
>>> Coco at maltedmedia.com
>>> https://pairlist5.pair.net/mailman/listinfo/coco
>> 
> 
> 
> ---
> This email has been checked for viruses by Avast antivirus software.
> https://www.avast.com/antivirus
> 
> 
> -- 
> Coco mailing list
> Coco at maltedmedia.com
> https://pairlist5.pair.net/mailman/listinfo/coco



More information about the Coco mailing list