[Coco] CoCo3 MMU Register question...

[Zippster]

Well, I guess I’m not sure on utility either.  Part of it is experimenting on my part, looking towards building other things.  Other than memory for OS9, it would have to be programmed for.

I’m sure a driver could be written to use it as a RAM disk.   A RAM disk would still be useful vs an SDC?

- Ed


> On Mar 30, 2015, at 2:00 PM, Boisy G. Pitre <coco at toughmac.com> wrote:
> 
> Hi Ed,
> 
> Just off the top of my head, designing an MMU for the CoCo 2 is essentially turning into an OS-9 Level Two machine ala the CoCo 3. I’m not sure what utility there would be in that. Besides complicating hardware, it would certainly require a new port of NitrOS-9.
> 
> What I think would be much more useful for the CoCo 2 is a RAM disk type product. The J&R Banker for the CoCo 2 did this, as I recall, with 512K.
> 
> Having a battery backed-up static RAM board that would interface to the CoCo 2 motherboard would certainly be useful.
> 
>> On Mar 30, 2015, at 1:53 PM, Zippster <zippster278 at gmail.com> wrote:
>> 
>> I have a scheme in mind, using a CPLD for address decoding, and high speed latches
>> for the MMU bank registers, that would operate similarly to one set of CoCo3 MMU banks.
>> 
>> With 8 banks (0-7), the same register locations in memory as the first instance in the CoCo3 (TR 0).
>> Using each memory location ($FFA0 - $FFA7) to hold an 8-bit value for the memory block to map to (in a latch).
>> 
>> Perhaps someone who knows about OS9 can tell me if a simplified MMU scheme like this would be
>> suitable to compile OS9 to use.  This is without a second task register, and no ability to read the MMU registers.
>> Those things could be implemented if necessary, but trying to keep it simple.
>> 
>> Any thoughts or suggestions?  Unfortunately I don’t know squat about OS9’s memory usage.
>> 
>> - Ed
>