[Coco] CoCo bus interface project

[Matthew D Stock]

On 4/17/2013 8:57 PM, Darren A wrote:
> The CoCo 3 has a 32K external ROM mode that is activated by some bits 
> in the GIME. This mode activates CTS assertions for the upper 32K of 
> the address space. The CoCo 1 and 2 have no such mode. For those you 
> would need to decode the addresses yourself and assert SLENB to 
> prevent the internal ROMs from being selected. Some commercial ROM 
> Paks included their own custom circuit for bank switching. Darren -
Thanks Darren.  That's both good and bad.  It means that I'm on the 
right track, but it also means that I need to know if the ROM in 
question supported the CoCo 3 to know which method to use.  How did the 
"old style" Paks behave when they were plugged into a CoCo 3?  I may be 
able to assert SLENB and use A15 (and probably a few others to avoid the 
high registers) instead of CTS when I know I've got a 32K ROM, even on a 
CoCo 3.

For the custom bank switching, I'm curious how they were able to effect 
those bank changes given the constraints on CTS and RW.  Did they send 
instructions to a special memory byte in the $FF40 using SCS?  It will 
be tricky to implement a generic method if there were different bank 
implementations.

Thanks for the tip... I'm going to start poking around with some of the 
other control signals and see what I can learn.
   -Matt