[Coco] Replacing Dynamic RAM with Static RAM

sales at gimechip.com sales at gimechip.com
Sat Jun 12 19:16:15 EDT 2010


Thanks. That would simplify things greatly by leaving the maximum paging RAM 
at 2Mb. Then I won't have to try to figure out a refresh scheme for that 
amount (512M) of RAM. I've successfully demultiplexed the Z bus for use with 
SRAM so this makes for a compact design using a single 1Mx16 SRAM. I just 
have to make sure the design is working correctly - I think the other fellow 
on this list was probably also working on the SRAM and another on 
CoCo3.com - by pooling our talents, hopefully we'll get this 2-megger 
debugged and into production, even if we only make 10 or so of them :-). I 
was told you would be the one to ask that question about 16-bit paging. I 
was hoping that if OS-9 itself could be extended to 16-bit paging that the 
apps would just work - however, judging by your response - they probably 
won't. So, we'll stick to 2-Megs for system RAM in this design. This also 
means we can leave the$FF8x area alone - it was reserved for future use in 
the CoCo 3, however, one of my speech systems super voice paks is mapped 
there. later versions of the super voice changed the addressing because a 
CoCo 3 upgraded MPI locks out the $FF8x range thus rendering the earlier 
Super Voice's unusable in the MPI. I programmed the PAL in my own MPI to 
enable $FF40-$FF8F so I could still use the supervoice without modifying it.

Additional memory could be added for, say, a RAM disk similar to the way 
Tony's RAMDISK Pak worked, however we could use SRAM & have it battery 
backed. I think this would be better than flash for routine tasks such as 
compiling to disk (the RAMdisk), but flash could also be added for storing 
more permanent code that isn't changed often. I've only been working with 
this stuff for around 3 years, but it's a lot more fun than video games :-)
Thanks All - John


----- Original Message ----- 
From: "Boisy G. Pitre" <boisy at tee-boy.com>
To: "CoCoList for Color Computer Enthusiasts" <coco at maltedmedia.com>
Sent: Saturday, June 12, 2010 1:41 PM
Subject: Re: [Coco] Replacing Dynamic RAM with Static RAM


>
> On Jun 11, 2010, at 9:41 PM, <sales at gimechip.com> <sales at gimechip.com> 
> wrote:
>
>> Boisy - would it be possible for OS-9 Level 2 or NitrOS-9 to be modified 
>> to use 16-bit paging? If not, then this project probably wouldn't have 
>> any practical uses other than RAMdisks, or storing several video pages 
>> for rapid animation. I was just wondering.
>
> I would have to take time to study this a bit to see what the 
> ramifications of 16 bit paging would be.  Expanding this would impact a 
> number of data structures including the process descriptor.
>
> Since system RAM suffers, my inclination is to leave the maximum 
> addressable RAM on a CoCo 3 at 2MB and focus on using the memory for 
> something else like a RAM disk.
>
>> I will put together a complete synopsis of all of the memory expansion 
>> work that I've done and post it to CoCo3.com and we can go from there. 
>> Note that Paul Bartons pages have been the inspiration for all of this. 
>> You guys should go check out Paul's LED Cubes - the video's are pretty 
>> cool - his page is: http://www.onlyonsaturdaynight.com/
>>
>>
>>
>> -John
>>
>> ----- Original Message ----- From: "Stephen Adolph" 
>> <twospruces at gmail.com>
>> To: "CoCoList for Color Computer Enthusiasts" <coco at maltedmedia.com>
>> Sent: Friday, June 11, 2010 7:37 PM
>> Subject: Re: [Coco] Replacing Dynamic RAM with Static RAM
>>
>>
>> J&R,
>> Whats your name btw.
>>
>> I have circuit boards for another project that should have all the
>> connectivity and stuff needed to implement this.  I just don't know
>> what the logic design is.  So, we could avoid PCB costs too, at least
>> for low volumes.
>>
>> I'm also quite good at the soldering part.
>>
>> Steve
>>
>>
>> On Fri, Jun 11, 2010 at 4:40 PM,  <sales at gimechip.com> wrote:
>>> Absolutely - putting the logic into a CPLD would be ideal. The ideal 
>>> latch
>>> would be a 9-bit non-transparent if you decide to put the design into a 
>>> CPLD
>>> - you can use the schematic entry and let the development suite generate 
>>> the
>>> HDL's. I'll send you all of the info when I get it together, if you 
>>> want -
>>> just let me know - I love working out this stuff. It's like a puzzle, 
>>> only
>>> way better :-)
>>> J&R
>>> ----- Original Message ----- From: "Stephen Adolph" 
>>> <twospruces at gmail.com>
>>> To: "CoCoList for Color Computer Enthusiasts" <coco at maltedmedia.com>
>>> Sent: Friday, June 11, 2010 2:56 PM
>>> Subject: Re: [Coco] Replacing Dynamic RAM with Static RAM
>>>
>>>
>>>> I have a large quantity of 1M x 16 3.3 V SRAM chips, and a large
>>>> quantity of CPLDs.
>>>>
>>>> These parts are perfect for such a card.
>>>>
>>>>
>>>>
>>>> On Fri, Jun 11, 2010 at 3:06 PM, <sales at gimechip.com> wrote:
>>>>>
>>>>> I just noticed the mention of using a single 2-Meg SRAM. That's what 
>>>>> I've
>>>>> been working on, but the SRAM is 1024x16 for a total of 2-Megs by 
>>>>> eight.
>>>>> The
>>>>> GIME has a 16-bit databus (sort of). Even bytes are in one bank and 
>>>>> odd
>>>>> bytes in the other, thus a 16-bit SRAM or two 8-bit SRAMs are ideal. 
>>>>> It
>>>>> can
>>>>> be done with an 8-bit wide SRAM as well, I suppose, but I haven't 
>>>>> tried
>>>>> that
>>>>> yet.
>>>>>
>>>>> I am using a 16x4-bit RAM array with associated multiplexing circuits 
>>>>> to
>>>>> extend the MMU registers by 8-bits.
>>>>>
>>>>> Since I'm using Static RAM, no modified refresh is required, plus if 
>>>>> the
>>>>> SRAM is battery backed, the various RAMdisk software can be 
>>>>> non-volatile
>>>>> (although some of the RAMdisks initialize the disk automatically - 
>>>>> that
>>>>> behavior would have to be patched out)
>>>>>
>>>>> The video can only exist within a 512K block - this is a GIME 
>>>>> limitation.
>>>>> Using Tony's method, a register holds the Video Bank data. During a 
>>>>> video
>>>>> cycle, the video bank data is presented to the RAM to select 1 of 4 of
>>>>> the
>>>>> 512K banks for video.
>>>>>
>>>>> The CPU, however, can access the entire 2-Megs via the normal paging
>>>>> method.
>>>>> During a CPU cycle the DAT register addresses are presented to the 
>>>>> Static
>>>>> RAM.
>>>>>
>>>>> There's a little bit more to it than that (for example, the dual WE*
>>>>> signals
>>>>> must be accounted for - I've done this by multiplexing them and using 
>>>>> A0
>>>>> to
>>>>> select which one passes to the SRAM for R/W* control - A0=0=even bank,
>>>>> A0=1=odd bank). This should be completed soon. I'll upload everything 
>>>>> to
>>>>> coco3.com and maltemedia for any who want to make use of it.
>>>>> J&R
>>>>>
>>>>> ----- Original Message ----- From: <sales at gimechip.com>
>>>>> To: "CoCoList for Color Computer Enthusiasts" <coco at maltedmedia.com>
>>>>> Sent: Friday, June 11, 2010 1:50 PM
>>>>> Subject: Re: [Coco] Replacing Dynamic RAM with Static RAM
>>>>>
>>>>>
>>>>>> Yes, that's what these were for, but I also uploaded a file that uses 
>>>>>> a
>>>>>> 256Kx16 SRAM for the CoCo3 for 512K. It needs a bit of work. It's 
>>>>>> here:
>>>>>> http://www.coco3.com/community/2010/06/512k-simm-and-sram-files
>>>>>>
>>>>>>
>>>>>> ----- Original Message ----- From: "Stephen Adolph"
>>>>>> <twospruces at gmail.com>
>>>>>> To: "CoCoList for Color Computer Enthusiasts" <coco at maltedmedia.com>
>>>>>> Sent: Friday, June 11, 2010 1:21 PM
>>>>>> Subject: Re: [Coco] Replacing Dynamic RAM with Static RAM
>>>>>>
>>>>>>
>>>>>> Interesting.
>>>>>> I've got a background activity thinking about how to use a single 2MB
>>>>>> SRAM
>>>>>> chip.
>>>>>> Seems that this is a way to replace each individual DRAM with an 
>>>>>> SRAM.
>>>>>>
>>>>>> Similar, yet different. hmm more thinking.
>>>>>> Steve A
>>>>>>
>>>>>>>> On 6/11/2010 8:57 AM, sales at gimechip.com wrote:
>>>>>>>>>
>>>>>>>>> Over the past year, I've had some success at replacing DRAM with
>>>>>>>>> SRAM.
>>>>>>>>> I
>>>>>>>>> have posted some of the schematics and designs to CoCo3.com in 
>>>>>>>>> these
>>>>>>>>> threads:
>>>>>>>>>
>>>>>>>>> http://www.coco3.com/community/2010/05/512k-upgrade-question
>>>>>>>>>
>>>>>>>>>
>>>>>>>>>
>>>>>>>>>
>>>>>>>>> http://www.coco3.com/community/2010/06/4164-dram-sram-replacement-1-by-jr-of-gimechip-com
>>>>>>>>>
>>>>>>>>>
>>>>>>>>>
>>>>>>>>>
>>>>>>>>> http://www.coco3.com/community/2010/06/4164-dram-%E2%80%93-sram-replacement-2-by-jr-of-gimechip-com-c19-march-2010
>>>>>>>>>
>>>>>>>>> It is relatively simple to demultiplex the multiplexed address 
>>>>>>>>> lines
>>>>>>>>> and
>>>>>>>>> to replace DRAM with SRAM. The above links should provide a great
>>>>>>>>> deal
>>>>>>>>> of
>>>>>>>>> information on how I've gotten it to work.
>>>>>>>>>
>>>>>>>>> As soon as I get the rest of my documents together on the 512K, 
>>>>>>>>> 1M&
>>>>>>>>> 2M
>>>>>>>>> CoCo 3 Static RAM upgrades, I'll get those posted as well. -J&R
>>>>>>>>>
>>>>>>>>> --
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>>>>>>>>> Coco at maltedmedia.com
>>>>>>>>> http://five.pairlist.net/mailman/listinfo/coco
>>>>>>>>>
>>>>>>>>>
>>>>>>>>
>>>>>>>>
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>
> --
> Boisy G. Pitre
> http://www.tee-boy.com/
>
>
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