[Coco] Assembler Question???

[Boisy G. Pitre]

Somewhat relevant to this discussion is the fact that today I received  
my textbook in the mail, "Synthesis of Arithmetic Circuits: FPGA, ASIC  
and Embedded Systems" for a graduate class I am taking this fall.

On Sep 2, 2009, at 2:22 PM, jdaggett at gate.net wrote:

> On 2 Sep 2009 at 13:45, uhmgawa wrote:
>
>> jdaggett at gate.net wrote:
>>> To the list:
>>>
>>> I have started looking at two FPGA cores for the 6809 in altering  
>>> one of them to handle
>>> 6309 opcodes and stumbled across a potential  issue. As far as I  
>>> can remember the
>>> Motorola Freeware Assemblers treat subtraction as adding the 2's  
>>> compliment of the
>>> subtrahend. Also I seem to remember that is how the internal  
>>> workings of the MC6809
>>> is. There is actually no subtractor but the assemly code has the  
>>> 2's compliment of the
>>> subtrahend and does addition.
>>
>> I don't believe that is the case as a subtract
>> operation sets the carry to the inverse of that
>> resulting from an add operation.  So in this
>> respect subtraction of x and addition of -x
>> aren't trivially interchangeable.
>>
>> Internally the ALU may well negate the subtrahend,
>> perform an addition, and invert the carry bit,
>> with this modification of an underlying add operation
>> being keyed by a subtraction opcode.
>>
>> -- 
>> uhmgawa at third-harmonic.com
>
> Yes with subtraction you treat the carry differently. I understand  
> that. What I needed to
> know was when the subtrahend is converted to 2's compliment, at  
> assembly or internally
> in the ALU. I now know that it is internal and all is well.
>
>
> thanks
> james
>
>
>
> --
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--
Boisy G. Pitre
E-mail: boisy at tee-boy.com
Web: http://www.tee-boy.com/