[Coco] 6309 instruction timing question

[Darren A]

On 8/26/08, William Astle <lost at l-w.ca> wrote:
> This is a question for the 6309 guru types out there.
>
> In native mode, many instructions execute 1 cycle faster than in
> non-native mode due to the "pre-fetch" cache. From the documentation I
> have, it's not clear whether that 1 cycle speed increase applies to the
> first instruction after a branch is taken. Has anyone tested this situation?
>
> Say, for example, you have:
>
> 	TSTA
> 	BNE NE
> 	...
> NE	CLRA
>
> In native mode, CLRA should execute in 1 cycle. However, if one arrives
> at it via the BNE instruction, would it still execute in 1 cycle or
> would it take 2 because the "pre-fetch" would be invalidated by the branch?
>
-------------

It appears that the CLRA instruction will execute in 1 cycle
regardless of whether it is executed sequentially or upon a branch
taken. I used a cycle counter program to test the two instruction
sequences below. They both used a total of 6 cycles:

Test  1
  LDA  #0
  BEQ  BP
  NOP
  NOP
  NOP
BP  CLRA


Test  2
BP  LDA #1
  BEQ  BP
  CLRA


I'm not sure how this fits with the "pre-fetch" explanation for the
faster operation.

Darren