[Coco] 6309 Weirdness ??

[John Kowalski]

Hi Darren,

I haven't checked this yet myself, but I suspect if there is some funny
stuff going on with the PC value during execution of opcodes that are able
to affect the PC register, it would likely be the result of the 6309's
opcode prefetch/optimisation.

It may be that at the time ADDR X,PC is performing the operation on the PC
register, the CPU may have already prefetched (or may even be concurrently
prefetching) the first byte of the next opcode and advanced the PC an extra
byte.

(Potentially, a further bug/glitch may result if the PC is modified *after*
the CPU had already prefetched the next opcode.  It may execute the already
prefetched byte but continue subsequent byte reads from the *modified* PC
value.)

I'm not sure how interrupts might affect this, but there may be potential
for the PC to act differently in this case if an interrupt is triggered mid
execution of the ADDR X,PC operation - in that the CPU will not try to
prefetch the next opcode (therefore not cause the glitch) if it knows it has
to process the interrupt after this opcode.

Just my 2 cents.  It sounds like a very plausable/possible "glitch" in 6309
operation.



At 04:20 PM 15/05/2007 -0600, Darren wrote:
>While putting together some new documentation for the 6309 CPU, I came 
>across some odd behavior with the new Inter-Register instructions. I was 
>wondering if anybody else may have come across this?
>
>All of the new Inter-Register instructions (ADDR, SUBR, ANDR, etc..) are 3 
>bytes in length, but when the PC register is used as either the source or 
>destination, the value utilized is the address of the instruction plus 4.
>
>So if X contains 0, and the instruction ADDR PC,X were executed at address 
>$7F00, you end up with $7F04 in X. However, on the MESS 6309 CoCo 3 
>emulator, you end up with $7F03 in X, which is how I assumed the instruction 
>should have worked (and I guess the MESS author(s) did too).
>
>Even stranger, if you implement an endless loop using the following 
>instructions:
>
>      LDX   #-4
>      ADDR  X,PC
>
>..the loop runs until an IRQ occurs, then when the interrupt routine 
>returns, it resumes execution at the address of the ADDR instruction minus 
>one, which in this case holds the value $FC (LDD extended). If you mask 
>interrupts before executing the loop, it runs forever.
>
>I am wondering if these are bugs in the 6309 which were never fixed. When 
>Hitachi decided, for whatever reason, not to reveal the new features, 
>perhaps they also abandoned any effort to thoroughly debug them.
>
>Note: I have performed tests in both native and emulation modes and there is 
>no difference.
>
>Darren
                                         John Kowalski (Sock Master)
                                         http://www.axess.com/twilight/sock/