[Coco] GIME Chip Registers and the ultimate repack
jdaggett at gate.net
jdaggett at gate.net
Wed Aug 4 13:49:53 EDT 2004
Kevin
Back about a year ago what started my thnking of a repack and
modifications was to look at making the motherboard smaller and
incoprorating a few more functions. One being capable of driving an
LCD monitor/panel. I wanted something that could be low power
and battery operated. I am doing this for an astronomy project.
Most likely the code will be opensource since much of the ideas I
have gained have been from open source. I good way to see how
VHDL and Verilog code is written and a wide variety of styles is to
go to opencores.org. There are several microprocessor designs to
study and pattern what you are after. I have been mulling around
some ideas of a FPGA version of the 6809/6309. I think a 6309
compatible would be more beneficial.
just some thoughts and what ifs given what FPGAs can do now.
james
On 4 Aug 2004 at 9:38, Kevin Diggs wrote:
Date sent: Wed, 04 Aug 2004 09:38:40 -0700
From: Kevin Diggs <kevdig at hypersurf.com>
To: CoCoList for Color Computer Enthusiasts
<coco at maltedmedia.com>
Subject: Re: [Coco] GIME Chip Registers and the
ultimate repack
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> Hi,
>
> Any thoughts about cutting the page size? In my opinion, 8k for a 64k
> workspace is ... ridiculous. This would not change the external pins,
> right?
>
> Will you be making the code public? I would like to learn from what
> you are doing so I can do the 6909.
>
> kevin
>
> P.S.: I don't get all this repacking? One of the things I like about
> the cocos are the new cases (i.e. did not like the uni case).
> I think they are kinda sleek looking.
>
> jdaggett at gate.net wrote:
> >
> > hello
> >
> > After seeing a few repacks of COCO3's I started mulling over an idea
> > of repacking and modernizing the coco a bit. I have started coding
> > some VHDL code to do the GIME chip in an FPGA. So far the MMU is
> > coded and syntesized and directly addresses 2 megs of ram. The
> > datram is a 16x8 and not the 16x6 currently used. Looks like the MMU
> > can run at 40 MHz with no problem. The plan is to use fast SRAM for
> > my repack. 512Kx8 20nS SRAM are relatively cheap, under $10 each.
> > 512Kx8 70nS SRAMs are under $5.
> >
> > After reading the Unraveled Series and studying the service manual I
> > have basically one area of concern. That is the INIT0 register
> > located at $FF90. From what I gather on cold restart or power up,
> > after coming out of reset it appears that the GIME chip is set with
> > the MMU off and in COCO 3 mode. RSBAsic initializes the INIT0
> > register and then programs the task registers at $FFA0 to $FFAF with
> > proper vlaues.
> >
> > What I contend to do is to come out of reset and have the INIT0
> > register default to $4E. That is:
> > bit 7 - "0"
> > bit 6 - "0"
> > bit 5 - "1"
> > bit 4 - "1"
> > bit 3 - "1"
> > bit 2 - "1"
> > bit 1 - "1"
> > bit 0 - "0"
> >
> > I think this will still be compatible with the RS Basic rom? Anyone
> > sure of this?
> >
> > I have to finish up coding the register stack to at least $FF97. I
> > have planned usage for $FF96 and $FF97 to drive an external clock
> > chip to generate various CPU bus speeds separate from the video
> > clock. After that it will be on to the video section.
> >
> > Thinking of putting a RTC at $FF80 to $FF8F also.
> >
> > Mind boggling as to what one can do with these FPGAs.
> >
> > james
> >
> > --
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>
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