[Coco] 64K Coco mode and the MC6883

Sean Conner sean at conman.org
Tue Mar 28 16:01:40 EDT 2023


It was thus said that the Great RETRO Innovations via Coco once stated:
> OK, here's some of the results, though it is late, and if something 
> looks wrong, it's probably how I am reading things.
> 
> The first sta $ffdf appears to be at $0197, which has S[2:0]=7, !WE is 
> not active

  I don't understand.  Is $0197 where the instruction is stored?  That
doesn't seem right to me, but if it ran, it ran.

> followed by the sta $8000, which also has S=7, and !WE active during the 
> second half of the cycle
> 
> sta $a000 also has s=7, !WE active on back half of cycle
> 
> sta $c000 also has s=7, !WE active on back half of cycle
> 
> Those do not match your table, which shows S=1,2,3

  Those were guesses, based upon my reading of the data sheet [1], which did
*not* explicitly state the S values for writing in this mode.

> $01a4 is sta $ffde, S=7, no !WE
> 
> sta $8000 is S=1, no !WE
> 
> sta $a000 is S=2, no !WE
> 
> sta $c000 is S=3, no !WE,
> 
> S values match up with your table
> 
> Interesting that in RAM/ROM mode, a write to ROM segments is violating 
> the bus, as the ROM and the CPU are both driving the bus.

  That's what I was thinking, reading over the MC6883 data sheet and looking
at the Coco schematic---it just didn't seem right to me.

> Then sta $fffdf again at $01b0 to bring in RAM
> 
> lda $8000 is S=0, as is lda $a000 and lda $c000, which matches your table
> 
> If you'd like to have me test all the S values for each mode and each 
> range of memory, feel free to send me another util and I'll run it.  

  I don't need it, as all I was curious about was if writes to RAM in
RAM/ROM mode go to RAM, which does not appear to be the case.  You didn't
mention what the BASIC program printed, but I'm guess it said "SWITCH
NEEDED".

  Thank you for running the tests.

  -spc

[1]	https://archive.org/details/Motorola_MC6883_Synchronous_Address_Multiplexer_Advance_Sheet_19xx_Motorola


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