[Coco] Pipelined 6809 microprocessor IP

[Kevin Phillipson]

(Reposting to CoCoList instead of direct email)

Hi Walter!
We did not target the 6309 b/c we specifically are aiming for the 8/16bit
niche. Our target customer is someone designing a subblock on an SoC or a
mixed signal ASIC that needs a microprocessor/microcontroller with a small
footprint. If we were to add the hardware necessary to support the 6309 we
would increase our required die area and be stepping up into the 16/32bit
realm (ARM Cortex territory). And as you noted there is no compiler support
for the 6309.

Now I’m not discrediting the 6309. It’s a great CPU. It just doesn’t fit
our requirements. We need to be small footprint, efficient and have
compiler support. The 6809 is near perfect for this. And the fact that it’s
~5x faster clock for clock means it would probably be faster than a 6309 at
the same clock rate anyway. And being capable of around 1GHz in a modern
semiconductor manufacturing process, it will have plenty of horsepower.

Having said all that, I'll never say never to 6309 support, but I have to
focus on finishing the 6809 ISA first and the big verification effort that
will follow. By verification I mean a full professional self checking
Verilog testbench that will run all the instructions with all possible
input variations. This verification will really make the IP attractive to
professional IC design companies.

Lastly, to answer your question about bus cycle vs clock cycle. The 6809
manuals list bus cycles. One bus cycle equals 4 clock cycles or 1
quadrature clock (E or Q). The Turbo9 does not use specially generated
clocks. One bus cycle is one clock, but the CPU is somewhat decoupled from
the bus via the pre-fetch instruction queue and pipelining making
instruction timing less predictable, but much faster.

Thanks for checking out our project!
Kevin Phillipson

On Mon, Jan 4, 2021 at 8:31 PM Walter Zambotti <zambotti at iinet.net.au>
wrote:

> That is just fantastic.
>
> What a shame they didn't target the 6309, but I suppose there are no
> compilers that
> take advantage of the extra instructions and registers.
>
> From the presentation I got confused between bus cycles and clock cycles.
>
> What do the instruction manuals normally quote, bus or clock?
>
> Regards
>
> Walter


On Fri, Dec 25, 2020 at 2:47 PM <richardcavell at mail.com> wrote:

> Excellent.
>
> Sent using the mail.com mail app
>
> On 20/12/2020 at 21:51, Kevin Phillipson wrote:
>
> > Hi everyone. I thought you guys would be interested in our graduate
> > research project - the Turbo9. My friend Michael and I are developing a
> > modern version of the 6809 that can be used as a small microprocessor IP
> in
> > ASICs and FPGAs.
> >
> > I believe our design is the first pipelined architecture to implement the
> > 6809 instruction set. We are about 5 times faster clock for clock than a
> > regular 6809 and running at over 100MHz in modern FPGAs. In a cutting
> edge
> > ASIC built in a 5nm process we would probably be in the neighborhood of
> > 1GHz!
> >
> > We make no attempt to emulate the same bus as the original 6809 b/c we
> are
> > using the Wishbone bus standard. So I doubt you would see this IP in any
> > CoCo FPGA designs. Our goal is to create a professional level IP for use
> in
> > modern SoCs and 6809 ISA really fit our needs well.
> >
> > Regardless, I think you might find our work interesting and I want to
> thank
> > the CoCo community for preserving all the 6809 resources we used as a
> > reference.
> >
> > Final presentation video for this semester:
> > https://www.youtube.com/watch?v=-_1-gokl-6I
> > (Note: youtube allows you to watch at 1.5x speed!)
> >
> > Presentation slides:
> > https://github.com/turbo9team/turbo9/blob/master/turbo9_overview.pdf
> >
> > The verilog code, microcode & microassembler source uploaded to github:
> > https://github.com/turbo9team/turbo9/
> >
> > We are currently looking to pursue our Master's Thesis to complete the
> > project over the next couple semesters.
> >
> > Let us know you think!
> > Kevin & Michael
> >
> > --
> > Coco mailing list
> > Coco at maltedmedia.com
> > https://pairlist5.pair.net/mailman/listinfo/coco
> >
>
>
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