[Coco] FPGA VS Software Emulators
Walter Zambotti
zambotti at iinet.net.au
Tue Jul 25 21:46:08 EDT 2017
Bill
>The Coco on a chip project uses SRAM @ 10ns access time. The
> CocoFPGA uses a faster SRAM which is why the speed difference. The
> reason software emulators can do a lot better speed is just that.
This memory how does it compare to the modern memory found in a current PC for instance?
> Both FPGA projects run on an internal clock of 50mhz which is then
> divided down to to a speed for each device connected (whether it's
> internally programmed or physically attached).
50mhz doesn't sound that fast. How does this mhz rating relate to that of a modern PC CPU. For instance the most that can be expected is a one to one comparison and so therefore 50mhz would be the maximum CPU 'emulation' speed.
And I assume different FPGAs with higher internal clock speeds equals faster 'emulation'!
Walter
-----Original Message-----
From: Coco [mailto:coco-bounces at maltedmedia.com] On Behalf Of tim franklinlabs.com
Sent: Tuesday, 25 July 2017 10:18 PM
To: CoCoList for Color Computer Enthusiasts <coco at maltedmedia.com>
Subject: Re: [Coco] FPGA VS Software Emulators
For the most part, what you described is correct.. with the exception
of your description: "Software Emulation". FPGA's are not software
emulation. FPGA's are programmable gates which are configured to act as
a specific hardware component (AKA Hardware Emulation). There's a huge
difference between "Software Emulation" and "Hardware Emulation". VCC
is a software emulator. DE-1 is a Hardware Emulator. I know this is
nit-picking but when making a comparison of real and emulated, the
devil is in the details. IMHO.
On July 25, 2017 at 8:50 AM Bill Nobel <b_nobel at hotmail.com> wrote:
Hi Walter good points to bring up.
The Coco on a chip project uses SRAM @ 10ns access time. The
CocoFPGA uses a faster SRAM which is why the speed difference. The
reason software emulators can do a lot better speed is just that.
Its a Software emulation, no speed limitations as it is a software
clock that is changeable based on the CPU it's being run on. FPGA's
still have to communicate to real hardware which will pass a
limitation to the speeds they run, depending on what is being
interfaced. Each hardware device will have a different speed rating.
Both FPGA projects run on an internal clock of 50mhz which is then
divided down to to a speed for each device connected (whether it's
internally programmed or physically attached).
There are many other factors that affect speeds as well, but in this
case the FPGA is not really the limitation, it's the hardware that
attaches to it.
Bill Nobel
b_nobel at hotmail.com<mailto:b_nobel at hotmail.com>
On Jul 25, 2017, at 1:02 AM, Walter Zambotti
<zambotti at iinet.net.au<mailto:zambotti at iinet.net.au>> wrote:
Before I start this is not a one is better than the other debate.
This is about better understanding each technology.
Ok so my initial thoughts regarding FPGA (as I really know nothing)
were
hardware simulation should
provide an end product that is more efficient and faster than a
general
CPU/software emulator.
However this does not appear to be the case.
The CoCo on a chip project emulates an 8mhz CoCo.
The CoCoFPGA project a 25mhz CoCo.
And VCC on my i5 (3.3 ghz) a 133mhz CoCo.
What causes these differences in end speed?
Why are the two FPGA projects so different in speed?
Why are both FPGA solutions slower than a CPU/software solution?
Is it the particular FPGA hardware itself?
Would high end FPGAs provide a different result?
I've just download the FPGA for Dummies eBook from Altera so I'm
starting my
education process.
Walter
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