[Coco] tcp off-loading

Bill Gunshannon bill.gunshannon at hotmail.com
Fri Apr 14 13:33:52 EDT 2017


________________________________________
From: Coco [coco-bounces at maltedmedia.com] on behalf of Al Hartman [alhartman6 at verizon.net]
Sent: Friday, April 14, 2017 12:28 PM
To: Bill Pierce via Coco
Subject: Re: [Coco] tcp off-loading

There were a couple of Z-80 Boxes you could attach to a Coco for 80 Columns and CP/M back in the day. Noty sure how many were made, or are still out there in the wild.

I wanted one back then, but never had the money.

-[ Al ]-
On 4/14/2017 10:42:41 AM, Mark D. Overholser <marko555.os2 at gmail.com> wrote:
On 13-Apr-17 17:19, camillus gmail wrote:
>
> Hi all,
>
> I followed the conversation about the tcp off-loading and I was just
> wondering if it would be possible to have a second 6809/6309 and a
> DMA controller and some support SRAM. The two cpu's could communicate
> on a interrupt based negotiation scheme, and the second one can be in
> control of the DMA controller, completely on his own. This would set
> the first cpu in a more convenient workload as he only has to be
> interrupted when data need to be read and rewritten from the support
> Sram into the standard coco ram. The second cpu can do the tcp stack
> more easy because it's the only thing it needs to do, except given
> commands to the DMA, and maybe the 6309 would be the better choice,
> for speed.
>

Has Anyone made a Coprocossor for the CoCo before?? The Apple ][ with
the 6502 has multiple Aux Processors... The first was the Micro-Soft
Z-80 Card, ( and Clones of the Z80 Card ), the Stellation Mill Cards
with the 6809, and I have some plans for a 68008 Card...



> The DMA can tranfer data way faster then cpu's can, so the time it
> would interrupt the cpu (s) is minimum.
>

That would be a benefit...

>
> This setup would also give a extra memory space to the coco, for
> extra hardware, like e.g. parallel port, dedicated serial port, etc
> etc. ( these extras would of course be optional, when the second CPU
> is not used for the the tcp stack.)
>

Network Interfaces like the ESP8266 WiFi Module are interfaced to
Microcontrollers or Microprocessors with SPI or I2C or a UART ( Serial )
Interface.. A Secondary Processor Would be a Given, in that a 1980's
era Microprocessor would not be able to get much of anything done if it
had to spend most of its time communicating with an ESP8266..

The WizNet W5100 is Bus Mapped Device, and wouldn't really need a Second
Processor, but in the end, every little bit helps...

Having the ability to add a Parallel Port, or 6551 Serial Port would be
a benefit for getting the CoCo to communicate with other devices...


> Hope this make some sense to someone...lol
>

Loud and Clear....

> Just my $0.02
>
>
> cb
>

_________________________________

Has anyone looked at the MISE and M3SE from Bartlett Labs?  They put CF (actually an
IDE interface) and also provide real time clock and Ethernet for the Z80 based Tandy
boxes.  Comes with both client and server TCP/IP applications for them.  Maybe this
is a direction people here should be going.  Is there a co-processor?  Well, yes. an
FPGA. :-)

bill


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