[Coco] tcp off-loading

[camillus gmail]

Hi all,

I followed the conversation about the tcp off-loading and I was just wondering if it would be possible to have a second 6809/6309 and a DMA controller and some support SRAM. The two cpu's could communicate on a interrupt based negotiation scheme, and the second one can be in control of the DMA controller, completely on his own. This would set the first cpu in a more convenient workload as he only has to be interrupted when data need to be read and rewritten from the support Sram into the standard coco ram. The second cpu can do the tcp stack more easy because it's the only thing it needs to do, except given commands to the DMA, and maybe the 6309 would be the better choice, for speed.

The DMA can tranfer data way faster then cpu's can, so the time it would interrupt the cpu (s) is minimum.


This setup would also give a extra memory space to the coco, for extra hardware, like e.g. parallel port, dedicated serial port, etc etc.
( these extras would of course be optional, when the second CPU is not used for the the tcp stack.)

Hope this make some sense to someone...lol

Just my  $0.02 


cb