[Coco] Fwd: IP packets on my coco

[Dave Philipsen]

I agree.  It's a slight disadvantage (the double abstraction).  I just 
wanted to make sure you saw all of the features to make a meaningful 
comparison.

I personally still like the idea of the ESP8266.  The only ethernet jack 
I have in my house is downstairs at the server box.  We do everything 
wifi.  And I'm guessing that's the way most households are nowadays. 
And, frankly, at least for right now I don't see myself doing anything 
much more complicated than checking email, up/downloading via ftp, etc. 
with my CoCo.  The biggest need I see is an untethered method of loading 
/ saving / organizing files.  And I bought several of these little 
ESP8266 cards for about 2 bucks apiece.  You really can't beat that.  
And, perhaps it's something that can be modified for the future if/when 
the CoCo gets into networking heavily.

Dave


On 6/10/2016 1:34 AM, RETRO Innovations wrote:
> On 6/10/2016 12:56 AM, Dave Philipsen wrote:
>> To be honest I haven't thoroughly researched or used any of the chips 
>> with the exception of the ESP8266.  And , initially, my only 
>> preference would be to stay away from the Cirrus chip because it 
>> doesn't support interrupts.  I'm not sure if you're understanding 
>> though that this CP2200 chip has a multiplexed mode where, as far as 
>> I can tell, the maximum amount of I/O space you'll need is two memory 
>> locations.  You'll need an 8-bit port through which you can read or 
>> write data.  That's one byte.  Then you'll need another port to 
>> exercise the ALE signal.  That's another byte.  I assume you're 
>> saying that it needs 114 (let's call it 114 instead of 141 because 
>> that's what I'm actually reading in the data sheet) bytes of I/O 
>> space based upon the fact that it has 114 internal registers.  But 
>> let's say you need to read or write to register number 114.  You 
>> simply assert the ALE line (also called AS) and put the address value 
>> (114) out on the 8-bit port.  Then you release the ALE line and read 
>> or write the data in that register (register 114).  So the same 8-bit 
>> port that is used to read and write data to the device is also used 
>> to select the internal register that you want to read or write.  No 
>> need to have a huge I/O space.
> True, but I assumed developers would balk at the double abstraction.
>
> The rtl and cs ICs do the same thing, but they do it using the 8 or 16 
> registers in the address space.  Specifically:
>
> cs/rtl:
>
> lda #<$cs/rtl memory address
> sta CS_RTL_BASE + CS_RTL_ADDRESS_REG_LO
> lda #>$cs/rtl memory address
> sta CS_RTL_BASE + CS_RTL_ADDRESS_REG_HI
> lda #DATA
> sta CS_RTL_BASE + CS_RTL_DATA_REG
>
> cp2200:
>
> lda #CP_ADDRESS_REG_LO ; select the Ethernet RAM address low register 
> in the window
> sta CP_BASE
> lda #ALE ; I am assuming here that ALE is a one shot, and we don't 
> need to reset it.
> sta CP_BASE+1
> lda #<cp memory address ; data
> sta CP_BASE
> lda #DS ; I am assuming here that DS is a one shot (inverted), and we 
> don't need to reset it.
> sta CP_BASE+1
> lda #CP_ADDRESS_REG_HI ; select hi register in the window
> sta CP_BASE
> lda #ALE ; I am assuming here that ALE is a one shot, and we don't 
> need to reset it.
> sta CP_BASE+1
> lda #>cp memory address ; data
> sta CP_BASE
> lda #DS ; I am assuming here that DS is a one shot (inverted), and we 
> don't need to reset it.
> sta CP_BASE+1
> lda #CP_DATA_REG ; select data reg
> sta CP_BASE
> lda #ALE ; I am assuming here that ALE is a one shot, and we don't 
> need to reset it.
> sta CP_BASE+1
> lda #DATA ; data
> sta CP_BASE
> lda #DS ; I am assuming here that DS is a one shot (inverted), and we 
> don't need to reset it.
> sta CP_BASE+1
>
>
>
>>
>> I'm not trying to sway you one way or the other between the rtl or 
>> the silicon labs.  They're both probably pretty good chips. It's just 
>> that you should understand what the capabilities of each are in order 
>> to make a good decision. 
> Fair enough.  I saw the multiplexed bus, but assumed it would 
> introduce too much IO cost.
>> The Silicon Labs part will require a cheap 3.3v regulator but the I/O 
>> is 5v tolerant so no level shifters would be required.
> Ah, correct there.  I even saw that, but it did not register.
>>   It appears to me that it only requires two bytes of I/O to work if 
>> you run it in multiplexed mode. Look at figure 3 on page 7. There is 
>> an 8-bit data bus which the 6809 CPU supplies. There are RD and WR 
>> signals which you would multiplex together to be controlled by a R/W 
>> line which the CPU supplies.  There's an INT line that goes back to 
>> the CPU.  And there's an ALE or address strobe line which is not a 
>> signal that would be supplied by the CPU or the cartridge connector.  
>> You could use one bit of a simple 8-bit latch to control that line. 
>> Total I/O = two bytes.
> I concur.
>>
>> If someone else sees it differently, correct me if I'm wrong. But 
>> that's the way I'm reading the data sheet.
> I see it the same way, but I see rtl/cs as having an advantage in this 
> space, since they don't need to do double abstraction.
>
> Jim
>
>