[Coco] Max baud rate for 68681 in MM/1?

Dave Philipsen dave at davebiz.com
Sun Jan 31 22:38:33 EST 2016


I'm not sure if Motorola (Freescale) even produces the 68C681 anymore 
but the ones I used were the Exar 44PLCC parts.  The datasheet is a 
little misleading when it says that maximum bit rate with a 16x clock is 
125 Kb/s because later the sheet says the maximum clock frequency is 
7.372 MHz which would yield a bit rate of 460.75 Kb/s. I would hazard a 
guess and say that the Exar 68C681 is quite capable of that speed and I 
can say for sure that none of the parts I bought ever failed to work 
with a 4 MHz clock and 250 Kb/s bit rate.

Dave

//
On 1/31/2016 9:22 PM, Dave Philipsen wrote:
> And any form of 68000 CPU should have no problem servicing interrupts 
> at 1Mbps.  The 68C681 has a receive buffer so you can receive many 
> bytes while generating only one interrupt and even if it did generate 
> an interrupt for every byte that's only 100k interrupts per second 
> which I believe is quite doable with a 68000. Without looking at the 
> technical info on the 6809 I would guess a 2 MHz 6809 could do it too 
> although it might tax it a bit.
>
> Dave
>
>
> On 1/31/2016 9:16 PM, Dave Philipsen wrote:
>> I have personally used a 68C681 UART in a 68HC11-based system that 
>> transmits DMX512 theatrical standard lighting data at 250 kbps 
>> (RS422/485).  It is tried and proven and currently running in about 
>> 400 different locations in the US and a few other countries.  It is 
>> using a 4 MHz clock as the BRG.
>>
>> Dave
>>
>>
>> On 1/31/2016 3:33 PM, Joel Ewy wrote:
>>> I read ambiguous information about the 68681 on the MM/1's I/O 
>>> board.  Does anybody have a definitive word?  Page 2-5 of the MM/1 
>>> technical manual claims that it can be run at "1 megabytes per 
>>> second" (seriously 8M bits/sec?), but the table on page 9-2 and the 
>>> text on 9-2 state that the maximum baud rate is 34,800.  Is this a 
>>> pragmatic maximum based on the CPU's ability to service the DUART's 
>>> on-chip buffers without interrupt-masking trickery, is it the real 
>>> hard maximum for the 68681, or is it a hard maximum imposed by the 
>>> MM/1's hardware? Anybody have any insight?
>>>
>>> JCE
>>>
>>>
>>
>>
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>
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