[Coco] ROM Cart registers

[RETRO Innovations]

On 1/31/2016 7:47 PM, Mark Marlette wrote:
> Jim,
>
> The SuperIDE's firmware is fine. It is beyond a mature device, it has moved to legacy support here. This device was released in 2004 and has been tested on almost every disk controller ever made for the CoCo.
>
> The sIDE is FULLY decoded and does use the SLENB~ signal to remove ALL devices in SCS region of the memory map.
Hmm.  I will check again, but I did not detect SLENB going low on the 
sIDE for any address except for $ff50-$ff5f, and the device I have is 
set to the default register mapping.
> It does not rely on being slot dependent, the slot, when in the MPI, is ONLY required for the boot ROM. After boot, when booting from the sIDE and in the MPI, you can move the switch or software poke off of the sIDE to the floppy controller or whatever slot you would like and still have access to the CF/ATA devices.
As it is showing, then, that would be true.  All $ff50-$ff5f addresses 
would be decoded to the sIDE at all times, no matter the software or 
selector switch setting of $ff7f
>
> It is following the Tandy rules for SCS as I designed it and understand them.
Well, I am still learning about SCS...
>
> As I watch the list and the thread out of the corner of my eye, I thought you indicated that your MPI was functional?
It is, as far as I have thus tested it before my query.    However, I 
did just test booting from slot #3 (sIDE), moving the switch to #1, and 
the cursor dies (it appears to lock up).  I previously assumed that the 
HDB-DOS was hooking the interpreter and when I move the switch, the cts 
signal no longer reaches the sIDE boot rom and thus the machine locks 
up.  Are you stating that I should be able to move the switch and this 
type DIR in the basic interpreter and not have it lock up?
>
>  From your posts here and questions of SLENB~, I wonder if the sIDE works in your device?
it does.  I save and load files from the CF card with ease, and HDB DOS 
1.1b boots when slot 3 is selected on boot.
>
> A true test is backing up a device with verify in your MPI. We tested 12-24hrs, without an error, many times.
You mean backing up a floppy disk, I assume.  I need to buy or somehow 
secure a FDD mech to do so.  I have the FD500, but no mech at present.

>
> The current generation goes ~300% faster. So if your MPI won't run the sIDE, it will not run Cloud-9's Gen 3 devices.
Well, it's not failing under load.  It's just that I was surprised that 
the sIDE registers show up all the time, no matter the slot.

And, though I am still learning about SCS, it does appear the sIDE 
ignores the presence of the SCS signal and responds on the bus whenever 
$ff50-$ff5f is accesses, no matter the state of the MPI slot register, 
as you note above.

I was under the impression that if the SCS signal was not triggered on a 
particular slot, that slot should not respond to $ff40-$ff5f accesses.

In any event, since I assume miniFlash uses the same basic firmware as 
sIDE with respect to $ff59, I am trying to determine how a ?peek($ff59) 
will respond in such a situation.  IN my case, trying to read any 
register from $ff50-$ff5f in slot #0 while the sIDE is in slot #3 does 
not return correct information.  I assume that's because my register 
outputs are fighting with the register outputs of the sIDE.
Jim