[Coco] Desired RESET behavior

[RETRO Innovations]

I was able to speed up the SPI by using the awesome quadrature clocks of 
the 6809.

q ^ e generates a doublespeed clock, which means the SPI will operate at 
2X the normal clock.  Thus, a byte can be transferred in 4 E clock 
periods.  I am not as familiar with the 6809 opcode timings, but I would 
assume that most opcodes that can read/write $ffXX would take at least 4 
clock periods.  Are there any that do not?

I *might* be able to abuse the Verilog to double the clock again, but 
I'd rather not.

jim