[Coco] ROM Cart registers

[RETRO Innovations]

   As noted in my response to Darren just now, I latched SCS~ and then
   asserted SLENB in a test to see if I could get my device to slide
   everything off the bus (I understand the sIDE is there, but I was
   assuming it would not be, since its slot was not selected.)

   I do see that Glenside is fully decoded.  That is unfortunate, as that
   means that the MPI available SCS~ space is effectively been halved in a
   system that uses an IDE controller.  Only $ff4x is available in the
   SCS~ space.

   And, it decodes the entire $ff5x space (it appears to repeat the latch
   byte for 8 bytes, as does sIDE to emulate it.)

   Are the registers for the Gen3 Virtual ROM pack in a specific spot (so
   I don't step on those address if I move them?)

   Jim