[Coco] SCS - $FF40 behavior

[Chad H]

I was hoping that was the case.  I'm planning on maintaining support for 16K/32K contiguous .ROM's.   The banking functions will be used for .BIN files.    I've written a multi-ROM builder already to help compile a bunch of smaller ROM's into one larger one that greatly simplies the process.   Once I've worked out the assembly language modifications and how each banks need to be marked in the image, I can have the multi-ROM builder apply the assembly loader and mark the segments automatically when it imports the .BIN file.

- Chad H
http://sites.google.com/site/cbhlab101/


-----Original Message-----
From: Coco [mailto:coco-bounces at maltedmedia.com] On Behalf Of William Astle
Sent: Friday, October 16, 2015 12:14 AM
To: coco at maltedmedia.com
Subject: Re: [Coco] SCS - $FF40 behavior

ROM mapping has nothing to do with SCS on the Coco3. If it did, the floppy controller wouldn't work under either disk basic or OS9 since neither one of those has the ROMs enabled during normal operation.

There is a "SCS" control bit in FF90 that affects SCS, but it has nothing to do with ROM mapping. I can't recall if that switches the behaviour of the FF4x range or the FF5x range. Most documentation just says "Enable standard SCS operation". That bit is set by the stock ROM at boot time.

On 2015-10-15 23:04, Chad H wrote:
> What do you mean "only after banking in the ROMs"?  From what I observed on my CoCo 2, a simple PEEK or POKE triggered the SCS line low for a few microseconds then it was released.  Is the CoCo 3 doing something different here?
>
> - Chad H
> http://sites.google.com/site/cbhlab101/
>
>
> -----Original Message-----
> From: Coco [mailto:coco-bounces at maltedmedia.com] On Behalf Of RETRO 
> Innovations
> Sent: Thursday, October 15, 2015 10:19 PM
> To: CoCoList for Color Computer Enthusiasts
> Subject: Re: [Coco] SCS - $FF40 behavior
>
> On 10/15/2015 8:45 PM, Chad H wrote:
>> Well I confirmed the ground triggering of the SCS line by accessing $FF40 is detectable by my o-scope.  Going to mod one of my 512K EEPROM boards and its external Atmega328 driven controller so that the Microcontroller can detect the SCS trigger.  Then going to combine that with a modification to the 25 byte assembly .BIN loader we came up with last year and 'hopefully' allow .BIN loads from EEPROM in excess of 16K by loading it in 8K segments at a time :)  This method, if it works, would keep the EEPROM map area within the &HC000 - &DCFFF 8K space and function for the CoCo 3 as well.   I still don't have a CoCo 3 to verify that $FF40 triggers the SCS line by default on those machines. Any details would be helpful.  If we can load a 512K EEPROM full of .ROMS of any size, and of .BIN's of any size, I think we can remove  most of the downsides people have pointed out.  With the external controller it could be left plugged in and remote bank-switched by the controller to red!
 uce wear o
n the cartridge port.  With larger .BIN file support it could be more useful for these.   Of course, I will have to get re-acquainted with the assembly .BIN loader :/
>>
>> - Chad H
>> http://sites.google.com/site/cbhlab101/
> I can confirm that SCS is low on Coco3 when accessing $ff40, but only after banking in the ROMs.
>
> Jim
>
>
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