[Coco] 128K/256K EEPROM Cartridge board

[Chad H]

Crap... I was hoping you were making sense of those 2 lines for me.  The chips apparently are sent from the factory with the software data protect disabled.  You have to send the bytes to enable it.  For our purposes this should be one less thing to worry about I would think.  So long as the chip isn't used and someone set the bytes?

I may have to jumper the initial batch in a way that will allow me to 'patch' those signals to different candidate lines until I get them figured out.  Still researching to figure out the best way to go about this...or just leave it read only after all.

- Chad

-----Original Message-----
From: Coco [mailto:coco-bounces at maltedmedia.com] On Behalf Of Mark J. Blair
Sent: Sunday, January 25, 2015 4:53 PM
To: CoCoList Computer Enthusiasts
Subject: Re: [Coco] 128K/256K EEPROM Cartridge board


> On Jan 25, 2015, at 14:49, Darren A <mechacoco at gmail.com> wrote:
> 
> 1. The CTS* line used for address decoding is not asserted on write cycles.

Ah, I was not aware of that. That already invalidates what I suggested in my previous email.

-- 
Mark J. Blair, NF6X <nf6x at nf6x.net>
http://www.nf6x.net/


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