[Coco] Learning CPU Architecture and Digital Design
Mark McDougall
msmcdoug at iinet.net.au
Wed Feb 20 06:30:18 EST 2013
On 20/02/2013 6:26 PM, John Kent wrote:
> When you say it messes up the graphics, is it the actual graphic drawing
> routines or does it more relate to the timing.
Definitely the timing. On the Vectrex, you draw a vector by setting the end
position relative to the current gun position, and then wait until - by your
calculations (timing) - the gun has drawn the vector length you need. Then
you need to either turn off the gun, or start the next vector.
The hardware uses integrators to adjust X,Y, which also have their own
timing characteristics; delays as they integrate and also decay via leakage.
These factors are all "well known" by the BIOS routines that use loops,
interrupts and ballast code to draw each vector.
On the CPU09-driven implementation, it draws what is roughly correct - you
can definitely see what it should look like - but one vector generally
doesn't join the previous, so it's all a bit "off". It depends on what is
being drawn; some screens look quite good, others are a disaster. The text
rendering, for example, uses very tight code as it requires very small
vectors and this very frequent changes to the X,Y, and as a result it's
unreadable.
Please understand that none of this is a criticism of your core in any way!
> I could make it cycle accurate, but verifying it would need a logic analyzer
> that I could compare the outputs with and something like chip scope to
(snip)
> have more important things competing for my time. You get what you pay for
> and in the case of the 6809 core you get a lot more.
Absolutely understood! I'm more than thankful we have a 6809 core that is
perfectly adequate for 95% of the designs I want to implement!
> If you upgraded it to the 6309, that's not cycle compatible with the 6809 as
> I understand it any way.. From what I've seen of the data for the 6309 it
> too is faster cycle for cycle. There is an emulation mode for the 6809, but
> I don't know if that changes the instruction timing as well. If memebers of
> the list have substituted the 6809E for a 6309E in there CoCos, can they run
> all the games, and the ones that are dependent on software timing loops ?
Understood. We'd be looking at having the operating mode set at
compile-time, via generics, so having different cycle timings for 6809/6309
mode would be feasible. There'd also be an 'optimal' mode that runs every
cycle as fast as possible, like the CPU09. And of course it would be
designed for high fMax, though we're not expecting miracles - there's some
sizable selectors and muxes in there! Of course, all this is in theory and
yet to be implemented, so take it all with a grain of salt!
Regards,
--
| Mark McDougall | "Electrical Engineers do it
| <http://members.iinet.net.au/~msmcdoug> | with less resistance!"
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