[Coco] Glenside website (new & old)

L. Curtis Boyle curtisboyle at sasktel.net
Thu Apr 18 23:49:30 EDT 2013


I would guess that the 6809 did not get segment registers added to it because it was already planned to have MMU chips handle memory > the 16 bit, 64K memory space. Gimix (I believe) used 2K blocks, while the Coco 3 used 8K blocks. This actually helped the position independent code, since you could map in different blocks for each process, in the same 64k memory locations, so that you could share the actual code. The 680x0 also had MMU add-on chips vs. segment registers as well, from what I remember.

L. Curtis Boyle
curtisboyle at sasktel.net



On Apr 18, 2013, at 9:30 PM, Lothan wrote:

> From: Arthur Flexser
> 
>> I always wondered why the CoCo is referred to as an 8-bit machine,
>> whereas the original IBM PC, which also had an 8-bit bus and 16-bit
>> registers, was consistently referred to as a 16-bit machine.
>> 
>> Art
> 
> As I recall, the only difference between the 8088 and the 8086 is that the 8088 had an 8-bit external data bus whereas the 8086 had a 16-bit external data bus. Internally, the data bus is 16 bits. The 20-bit address and 8- or 16-bit data bus used the same pins so memory access was a lot slower than on other processors. The only advantage to this approach is that Intel could squeeze it into a 40-pin DIP.
> 
> Overall, the 8088/8086 had four 16-bit accumulators (or eight 8-bit accumulators), two 16-bit index registers, two 16-bit stack pointers, four 16-bit segment registers, and a 16-bit instruction pointer. The only thing here that wasn't already in the 6809 are three extra accumulators and the segment registers.
> 
> Looking at it from this perspective makes me ask the same question. Both the 6809 and 8088 had an 8-bit external data bus and both were essentially 16-bit internally.
> 
> This does raise a question, though. The only real advantage to the 8088 is that it had segment registers that were used to augment the 16-bit instruction pointer register to develop a 20-bit physical address ((CS * 16) + IP). As much as I despise the 8088's segmented architecture, it makes me wonder what might have happened if Motorola or Hitachi had bolted on a couple of segment registers to the 6309 to give it an effectively flat 1MB address space.
> 
> I remember back in the day the 80x86 architecture did not support position-independent code (and still doesn't to this day as far as I'm aware) and Windows didn't support hardware task switching, both of which were directly supported by OS-9 on the 6809 way back in the early '80s. Offhand, I'm thinking Windows Me still relied on the message pump for task switching and didn't switch to a hardware timer until Windows 2000 on the Pentium processor.
> 
> 
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