[Coco] Coco compatible monitors...

John Kent jekent at optusnet.com.au
Tue Jul 5 11:02:32 EDT 2011


Hi Gene

On 6/07/2011 12:04 AM, gene heskett wrote:
> On Tuesday, July 05, 2011 09:50:20 AM John Kent did opine:
>
>> Terasic DE1 is here:
>> http://www.terasic.com.tw/cgi-bin/page/archive.pl?No=83
> No doubt capable, but way too big to hide in a cc3 unless the whole coco
> was emulated.
>

You've seen Gary's CoCo3FPGA, surely .... It's been mentioned on the 
list often enough.
It emulates the entire CoCo3 and uses a modern LCD display and PS/2 
keyboard.

You'd have to design your own PCB for the GIME chip replacement.
The point was that with the CoCo3 design there should be a GIME 
component to the design that could be separated off an put into it's own 
smaller FPGA. That is if Gary makes his CoCo3FPGA open source, which I 
think he plans to in the not to distant future.

>
> That maybe could be hidden under the keyboard.  With a vga output no less.
>
> Would I have to run the development system on windows?  If yes, no deal.
>
The Spartan 3 starter board does have expansion connectors, but whether 
there are enough pins for the PLCC 68 pin chip I'm not sure. Some of the 
pins on some of the connectors are shared with the on board SRAM address 
and data bus, but if you disabled the on board RAM you could use them.

You'd still need the 3.3V to 5V bus switches to do the level conversion.

> the development stuff for xilinx is nearly free, so that, and custom made
> breakout cables might add a lot of functionality to a coco3.
>

Xilinx have webpack ISE which is free to download. It's about 2-3GB.
Altera have free Quartus II development software which is a similar size.
You'd have to register with Xilinx or Altera to download them.

You'd have to learn verilog or VHDL hardware description languages, 
although there might be a schematic capture option too, although that is 
not portable between the two vendors I don't think. VHDL & verilog are 
similar to normal pogramming languages in that they have standard 
control structures such as case/when and if/then/else. The difference is 
that you are generating a hardware description with them rather than a 
set of instructions. Case/when for instance is analogous to a decoder 
chip, or multiplexer, although the inputs and outputs are not restricted 
to a single bit.

Micro computers are essentially time division multiplexed logic using 
the ALU to perform the operations sequentially. With a hardware 
description language like verilog or VHDL you are actually defining a 
hardware configuration for the FPGA logic that operates in parallel with 
all the other hardware.  It's a like connecting all the ALU operations 
of a micro computer end to end to operate in parallel with the variables 
being hardware registers in between the various stages.

VHDL and Verilog allow you to define components or entities that can be 
instantiated as many times as you like, or as many times as fits in the 
chip. So for instance if you define a 6850 ACIA you can instantiate it 
(i.e. produces copies of it from the definition) as many times as you 
like in your design. You are of course limited by the amount of logic 
available in the FPGA and you have to connect them together in your design.

> For about 90 bucks and some time, that looks like a usable gizmo. IIRC,

There are only 40 pins available on the XuLA boards and a number of them 
are allocated to supply rails, clocks and resets and so on. Some of the 
pins are inputs only and again you'd need 3.3V to 5V bus switches.

>
>> There are a number of other Xilinx boards from Digilent Inc. and others.
>>
>> Digilent is to Xilinx what Terasic is to Altera.
>>
>> There are pictures of the FPGA boards I use on my FPGA page:
>> http://members.optusnet.com.au/jekent/FPGA.htm
> bookmarked.
> Cheers, gene
Hope that helps explain things.

John.

-- 
http://www.johnkent.com.au
http://members.optusnet.com.au/jekent




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