[Coco] [!! SPAM] Re: Coco compatible monitors...

[John Kent]

On 2/07/2011 2:45 PM, John Kent wrote:
>
>
> On 2/07/2011 7:34 AM, Joel Ewy wrote:
>>
>> I wouldn't mind having an LCD monitor that syncs to 15KHz.  One 
>> problem I've seen using an ordinary SVGA LCD monitor with CoCo3FPGA 
>> is that since the monitor's "native" resolution is not the same as 
>> what the FPGA board puts out (640x480 I suppose) there are vertical 
>> bands of fuzziness that run through the screen.  Not a big problem, 
>> but it slightly mars an otherwise beautiful picture.  I suppose most 
>> LCD monitors meant for SVGA will suffer from similar issues.
>>
>> JCE
>
> Yes is does sounds like an aliasing problem. 640x480 works out well 
> for a 25MHz pixel clock. The FPGA boards normally have a 50MHz clock 
> which you just divide by 2. 640 horizontal display pixels works out to 
> 800 pixels or clock cycles per horizontal scan line. 25MHz / 800 = 
> 31.25KHz which is pretty typical for PC monitors. 31.25KHz / 60Hz 
> frame rate is about 521 scan lines, of which say 480 are displayable. 
> I use an old CRT display for the FPGA monitor, so aliasation (sp?) is 
> not a problem. If you are using a LCD monitor is say 1280 pixels 
> across then you will get aliasation. 640 display pixels is 80 
> characters x 8 pixels / character which is a multiple of the 40 
> character low res display.
>
> Some FPGA boards such as the XESS XST-4.0/XSA-3S1000 combo, the Altera 
> DE2 / DE2-70 have video digiziters on that than allow you to capture 
> composite video and store it in a frame buffer. You can then read it 
> back and display out the VGA connector at higher speeds. They are a 
> very expensive way of building a scan rate converter though. The 
> Spartan3E starter board from Digilent also has a VDEC-1 video 
> digitizer available for it, but it only has SDRAM on the board which 
> is difficult to interface to.
>
> This is a 15KHz RGB / YUC component video scan rate converter here
>
> http://www.ambery.com/rgbcgatovgac.html
>
> If the CoCo video is composite though, you'd need a TV composite 
> decoder chip in front of it.
> You could probably do it with a large CPLD and a TV decoder chip.
> I think some one on the list was designing a scan rate converter so I 
> guess it's a matter of waiting for that.
> I'm not sure it will overcome the aliasing problem.
>
> John.
>
actually 1280 pixels is 2 x 640 isn't it ... so assuming the pixels and 
timing are right it should be an exact multiple of 2
  John

-- 
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