[Coco] Today, I have seen the CoCo 4...

[jdaggett at gate.net]

On 8 Jun 2010 at 1:07, Mark McDougall wrote:


> jdaggett at gate.net wrote:

> 

> > If you are referring to the 30 pin SIMM modules using EDO or Fast page

> > DRAM, they would be to slow for a soft 6809 in an FPGA. At 25MHz clock

> > speed you need 40nS access time or faster. That leaves the newer SDRAM

> > chips or fast SRAM to give a soft COCO fast enough memory.

> 

> The DE1 has 8MB of SDRAM. There is a relatively simple SDRAM controller on 

> opencores that is used on the DE1 in the Zet project. The main issue with 

> SDRAM is the latency when setting up a new burst access. In this case you 

> can hold off the 6809 if required, but then you run into problems when using 

> SDRAM for video memory. Without deep caching, it can't be done.

> 

> Regards,

> 



Mark 

Thanks for that input. I saw the latency issues and was not real comfortable with it. I was not 
sure how to solve the problem other than slowing down the CPU and hopefully a burst will be 
done before the next cycle. Then at defeats increasing the cycle period. Caching is 
something that I need to better understand implementation.


james