[Coco] 6809/6309 Power Analysis

[jdaggett at gate.net]

On 21 Jan 2010 at 17:55, Christian Lesage wrote:

> I believe it's going to be tricky if you intend to measure the power 
> consumption related to the execution unit alone. You have to remember 
> that part of the total power is delivered to the external busses and 
> varies with the input or output levels as well as on the load. For 
> instance, no matter what instruction will be be executed, the power 
> consumption could differ whether you output $FFFF or $0000 on the 
> address bus in order to fetch it. In one case, you are sourcing current, 
> while in the other case, you are sinking current. The same applies to 
> the data bus, but in addition to that, whether you read or write a value 
> will also affect power consumption. As regards the address bus, your 
> program will be outputting a value there whenever it needs to read a new 
> program or data byte. You only have a limited control over the addresses 
> being output. As regards the data bus, your program will always be at 
> least fetching a new program byte every few cycles, and again, you have 
> a limited control over what's being read. I believe the particular 
> opcode of a given instruction as well as the operand's value could 
> affect power consumption (e.g. reading $FF could require more/less power 
> than reading $00). It also depends on whether the busses are buffered 
> from the memory and I/O circuits, and how "efficient" the buffers are 
> (e.g. driving a HCT CMOS buffer requires less power than driving an LS 
> TTL one).
> 
> Christian

Some of the issues you mention will be a mute point if the same RAM/ROM ics are used 
throughout the whole project. The only time different I/O port currents would come into play is 
if the ROM or RAM were to change during any of the tests. 

>From what I gather the idea is to mesure the dynamic change in current from instruction to 
instruction. What is intended is a current profile of the chip as it executes instruction. The 
theory is that certain intructions will have more effect on the current than other instructions. 

What is the real problem is that the instructions are  not of equal time frame. Take the STA 
insturction depending on mode will be three to five machine cycles. The MUL command 
takes 11 cycles. If the processor is ran at say 2 MHz, you have a machine cycle time of 
500nS. The variation from one instruction to another will be short in duration. Now if you slow 
the processor down to say 100KHz you can get a beter profile and then exptrapolate that 
upward as the clock speed is increased.  

I tend to think that at least on the 6809 there could be some change. The internal logic may 
have several levels of gates that when swiched for various instructions will impact current 
when some intructions are being performed. If the 6309 is indeed a microcoded processor 
there may not be the change in current as the microcode is often stored in a microrom that is 
say 2K by 56 bits. Then the microoperations would be more constant from instruction to 
instruction and not have as great a variation as the MC6809.

just my thoughts

james