[Coco] Multi-Pak card edge connectors.
jdaggett at gate.net
jdaggett at gate.net
Fri Jan 15 17:43:52 EST 2010
On 15 Jan 2010 at 7:19, Brian Blake wrote:
>
>
> Heh... And I was referring to my PCB layout I'm working... Can't wait to see you guys tear that apart, lol... And yes, I'll take it in stride because I'm new at this and I want the damn thing to work, lol!!!
>
> I did ask Tom about the S parts he has called out - he said he had prblems when he used the LS variants...
>
>
> Brian
>
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After looking at his schematic I can understand why. Trying to do what is done in the PAL
chip with discrete logic adds a couple of layers of logic and the associated propogation
delays along with fan out issues. There are only two Schotky devices in the schematic.
Twenty discrete logic ICs? All that can now be done easily in a CPLD.
james
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