[Coco] Assembler modifications and a super 6309 processor

[jdaggett at gate.net]

Another Questionfor the Software Guru's out there:

Not really being a programmer in C/C++ and since most assemblers are programmed in 
C/C++, how difficult would it be to modify the more common used assemblers for  6309 
for new instructions?

I was looking through the 6309 Technical Guide by Chet Simpson and was insterested 
by Alan Dekok's notes:

He stated:
"  The W,E, and F registers do not have the full immediate addressing
mode capabilities that D,A, and B do.  SBC, AND, BIT, EOR, ADC, OR
with E,F,W are available only in register-register mode.  LSR, ROR,
ROL are available for W but not for E,F.  ASR, ASL, LSL, NEG do not
exist at all for W,E,F."

Adding the Immediate Mode for instructions like SBC, AND, EOR, OR and ADC for the 
the E,  F, and W registers is rather easy. Would it be worth the effort to undertake this? I 
can put all those all on page three of the opcode map and they would have the same 
opcodes as their page one instructions. The $11 page code would just switch target 
register acted on. Real simple to do.

Also how hard would it to be to add several new commands. I was thinking two like in the 
HC11, BRCLR and BRSET. Test a bit in memory and branch if set or cleared. Good for 
testing memory mapped I/O ports. 

I also remember some conversations before about the DIV instructions and a few were 
not impressed with the way the 6309 implements them. I was thinking along the lines of 
implementing division like the HC11, with IDIV and FDIV. That is Integer and  Fractional 
division (16 bit). That will be a bit more detailed but division is nothing more that shift and 
subtract. Even thought of adding BCD ADD and BCD Subtract instructions. 

just some curious thoughts on how to improve an already good processor. 

james