[Coco] "Reading" non-readable bytes with PEEK vs ZBUG

Darren A. darccml at hotmail.com
Tue Jan 22 19:21:48 EST 2008


James,

Do you have a copy of the 6809 datasheet handy? If you look at the cycle flowchart for the Indexed Addressing Mode, it shows that during cycle 3, the address bus is NNNN+2 (where NNNN is the opcode address) and the data bus is "Dont Care". In the case of LDB ,X this cycle immediately precedes the one where the data is loaded from the effective address. Doesn't this mean that a read of NNNN+2 occurs one cycle before a read of the effective address? It sure seems to fit with the results we are seeing.

Darren

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> I refuse to believe that the data loaded into the accumalator is being corrupted by a load to the instruction register on a following machine cycle. As I stated in a earlier post if this is true then it is a major major major issue and should have been caught decdaes ago.  I still believe the data is being corrupted external to the CPU and is being clocked in on the falling edge of the E clock.


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