[Coco] A faster "Real" CoCo Re: General Memory Question about speed

[jdaggett at gate.net]

On 16 Jan 2008 at 17:15, Dave R in Illinois wrote:

> After thinking about this last night, I think it would be best we lean
> "away" from the development boards, and perhaps scale it back some to
> lower parts total/cost. If a simple schematic is made, I can create a
> pcb or something else useful for the project.  I have made quite a few
> pcb's in the past with great success. I also have local PCB
> fabricating companies less then 3 minutes away from home!
> 
> 
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IF you are going to use an FPGA then I would highly consider right now a development 
board. Getting one with a device that is big enough will go a long way to any part count 
reduction. FPGAs in QFP packages are generally limited in I/O or capacity.  The BGA 
packages that most FPGAs use dictate that any PCB design will be a  four or six layer 
board. Even a 256 pin BGA almost dictates a 6 layer board to get all the pins routed out. 
Small quantities( one or two for prototype) of a six layer board say 5 inch by 5 inch will be in 
the $300 range. IF you can find someone that can do that small. Most want a minimum 
quantity of 10 for 6 layer. 


> 
> I guess the first thing to do would be to hammer out a list of goals
> here, then try to accomplish one by one. Sticking to a layout similar
> to a CoCo 3 would most likely be best in the long run. I was thinking
> perhaps a CoCo 2 / 3 hybrid. With both a dedicated VDG from the coco2
> and the GIME from the Coco3, with a simple hw based switch. IMHO this
> makes the most sense, if we are to go forward; we should also find a
> way to be more backwards compatible in the same respect. I would also
> like to see some sort of flashable bios. This shouldn't be too hard to
> integrate, seeing how there are flash (although not perfectly pin
> compatible) 28 pin 27c replacements, such as the Atmel AT29C256.
> Adapters are available cheaply though, or we could just design the pcb
> with it in mind to begin with. :-)
> 
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Either one VDG or GIME but not both. The external switching would be a nightmare. Alright 
if you are going to stay in the 1 MHZ speed range. In an FPGA the GIME can be tailored to 
do what ever you want. RIght now I beleive that John Kent's 6809 and a GIME chip will fit 
nicely into a Spartan 2E 300K gate device. 

Also 256Kbit flash devices are slow and limit any FPGA based CPU to about 7 MHz. Better 
to use serial EEPROM. In a FPGA one can use a block rom (512 bytes) to do a boot from 
serial eeprom and load it into exteranl sram. Then run what ever you want from there. 

Definitely you want to make a plan as to what you want and means to get to where you 
want. ALso weigh costs. try not to reinvent the wheel if necessary.

james