[Coco] A faster "Real" CoCo Re: General Memory Question about speed
msmcdoug at iinet.net.au
Mon Jan 14 20:40:24 EST 2008
jdaggett at gate.net wrote:
> Yes one could be based on that. There are several hurdles to overcome in
> doing so. One would be do we base it on a given FPGA development board
> or go for a dedicated board something like the C-One.
You can go a *long* way with the design before having to decide on target
hardware. There are an increasing number of development boards with
compatible resources which would serve as a prototype platform for any
I have successfully ported a number of projects to several different
development boards with minimal changes. Perhaps the best choice to make
up-front is the FPGA vendor (Altera/Xilinx). That simplifies the work
somewhat, especially where FPGA memories and timing constraints are
involved. The PLL/DCM is not so much of a problem.
Using a single generic 'core' the design can accommodate several hardware
platforms using a top-level wrapper in conjunction with generics/constants
if required. In fact, I find it even promotes better design practices...
| Mark McDougall | "Electrical Engineers do it
| <http://members.iinet.net.au/~msmcdoug> | with less resistance!"
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