[Coco] Coco proto board

[Phill Harvey-Smith]

Quoting Mark McDougall <msmcdoug at iinet.net.au>:

> Mark McDougall wrote:
>
>> Which address lines should I route to the CPLD for decoding? I was
>> thinking perhaps the top few lines and the bottom few... what would be the
>> best mapping options for such a board?
>
> What logic drives the CTS# (cartridge select) pin? I'm thinking I can use
> CTS# and not decode any high-order address bits???

Yep I have done that in the past (with an Xilinx 9572), from the top  
of my head
CTS, A0-A4, R/W, E and Q should allow you to decode any address in the  
$FF40-$FF5F range (at least on the CoCo 1/2 & Dragon machines, I  
believe that the CoCo3 can be configured slightly differently).

You may also find it usefull to route FIRQ, NMI and HALT to the CPLD  
as this will allow you to have inturrupting hardware, also routing the  
data lines to the CPLD will allow it to be a latch or data buffer,  
e.g. as on the Dos carts for drive selects etc.

Cheers.

Phill.


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