[Coco] 6309 Weirdness ??

[Darren A.]

While putting together some new documentation for the 6309 CPU, I came 
across some odd behavior with the new Inter-Register instructions. I was 
wondering if anybody else may have come across this?

All of the new Inter-Register instructions (ADDR, SUBR, ANDR, etc..) are 3 
bytes in length, but when the PC register is used as either the source or 
destination, the value utilized is the address of the instruction plus 4.

So if X contains 0, and the instruction ADDR PC,X were executed at address 
$7F00, you end up with $7F04 in X. However, on the MESS 6309 CoCo 3 
emulator, you end up with $7F03 in X, which is how I assumed the instruction 
should have worked (and I guess the MESS author(s) did too).

Even stranger, if you implement an endless loop using the following 
instructions:

      LDX   #-4
      ADDR  X,PC

..the loop runs until an IRQ occurs, then when the interrupt routine 
returns, it resumes execution at the address of the ADDR instruction minus 
one, which in this case holds the value $FC (LDD extended). If you mask 
interrupts before executing the loop, it runs forever.

I am wondering if these are bugs in the 6309 which were never fixed. When 
Hitachi decided, for whatever reason, not to reveal the new features, 
perhaps they also abandoned any effort to thoroughly debug them.

Note: I have performed tests in both native and emulation modes and there is 
no difference.

Darren

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