[Coco] [Color Computer] Re: POKE 65495,0

[jdaggett at gate.net]

On 4 Feb 2007 at 16:15, Joel Ewy wrote:

> jdaggett at gate.net wrote:
> > ...
> > By "good" I mean that  you have a set of ram chips that hold the
> > well charge longer than the specified time period. Still I have
> > reservations that any dram can retain a logic "one" charge for
> > upwards to 8 seconds without refresh. Also I have to point out that
> > there is a remote possiblity that there is an error in the MC6883
> > data sheet. That is to say that switching to high speed may "not"
> > disable the refresh grants. That is the first t hing that comes to
> > mind when  you report such long periods of dram retention. 
> >
> > james
> > ...
> >   
>     Could it even be that different production runs of the SAM have
> different behaviors?
> 
> JCE
> 
There was a second generation of the SAM chip called 74LS785 that I think appeared in the 
Coco2. One of its main features was to extend the refresh counter from 7 bits to 8 bits. This 
allowed the usage of 64Kx1 dram chips. Since I don't have a spec sheet on the 74LS785, so 
I can't verify that any other functions have changed. From what I have read the 74LS785 is 
pin for pin compatible with the 74LS783/MC6883.

james