[Coco] COCO DTV
msmcdoug at iinet.net.au
Fri Feb 16 03:21:00 EST 2007
jdaggett at gate.net wrote:
> 1) Are you familiar with HDL languages and which one, Verilog or VHDL.
> Right now most of my work is being done in VHDL. Not sure what Mark is
> doing his in.
My language of choice for synthesisable code is VHDL. Having said that, I've
also done quite a bit of work with Verilog - both testbench code and
integration of third-party cores.
| Mark McDougall | "Electrical Engineers do it
| <http://members.iinet.net.au/~msmcdoug> | with less resistance!"
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