[Coco] Bitbanging limits

[Roger Taylor]

At 08:04 PM 4/28/2007, you wrote:
>>From: Roger Taylor
>>
>><snip>
>>
>>In 8 cycles you can LSR <34 which is 65314, pushing bit #0 into the 
>>carry bit, followed by a RORA which pushes the carry bit into the data byte.
>>But, to prevent graphics distortion on a CoCo 1/2, you might have 
>>to first set up the PIA's DDR so that bits 1-7 are input bits 
>>during the receive routines.  This way, an LSR to that register 
>>shouldn't corrupt anything.
>-
>
>Roger,
>
>Am I missing something?  The following code also executes in 8 cycles:
>
>  LDB   <$22  4 \
>  LSRB        2  | 8
>  RORA        2 /
>
>The one disadvantage is that you clobber B so you can't use it for 
>some other purpose.


B is the byte block counter in my example, with 256 bytes being good 
for sector transfers.  Again, since the bitrate is not standard, I 
doubt I'll pursue this path in any serious CoCo-to-PC project.  The 
Windows API probably doesn't support the bitrate, and if it does, 
there's no guarantee that the motherboard/chipset or possible USB 
serial adaptor will match the speed.

I think 57600/115200 bps is probably the most compatible limit of the 
bitbanger port on a 6809 CoCo, with 57600 bps being the most 
compatible between all of the different versions of the CoCo and 6821 
PIAs.  If you use 115200, it should be an option and not the 
ideal/standard rate since it's probably not going to work with ALL 
CoCos.  My 57600 bps code achieves 115200 bps only when the CPU is in 
double-speed mode, and if the 6821 PIA is rated for that speed.

I've come up with all sorts of crazy ideas for faster bitrates, but 
the higher it climbs the more chances for errors and the question of 
whether the 6821 in your CoCo can handle it.  It's fun trying, anyway.








-- 
Roger Taylor