[Coco] Re : Re : FREE Services For Members Of The CoCoList at Malted Media

[Sylvain Rousseau]

This is the source code I used in my CPLD.  I hope I will can to send you a schematic later this weekend.
 
Thank you all for your help.
 
Sylvain
 
MODULE sramupgrade
TITLE '512k sram upgrade'
      "Sylvain Rousseau"
      "November 18th, 2006"        
// Inputs
RAS  PIN;    " DRAM RAS : Row address strobe
CAS  PIN;    " DRAM CAS : Colomn address strobe
WE0  PIN;    " WE0 : Write enable byte 0
WE1  PIN;    " WE1 : Write enable byte 1
ZBUS8  PIN;    " ZBUS A0-A8
ZBUS7  PIN;    " ZBUS A0-A8
ZBUS6  PIN;    " ZBUS A0-A8
ZBUS5  PIN;    " ZBUS A0-A8
ZBUS4  PIN;    " ZBUS A0-A8
ZBUS3  PIN;    " ZBUS A0-A8
ZBUS2  PIN;    " ZBUS A0-A8
ZBUS1  PIN;    " ZBUS A0-A8
ZBUS0  PIN;    " ZBUS A0-A8
// Outputs
WE  PIN ISTYPE 'COM';  " WE : Write enable to SRAM
OE  PIN ISTYPE 'COM';  " OE : Output enable to SRAM
ADDRH8  PIN ISTYPE 'REG,BUFFER'; " ADDRH : Address High bits to SRAM
ADDRH7  PIN ISTYPE 'REG,BUFFER'; " ADDRH : Address High bits to SRAM
ADDRH6  PIN ISTYPE 'REG,BUFFER'; " ADDRH : Address High bits to SRAM
ADDRH5  PIN ISTYPE 'REG,BUFFER'; " ADDRH : Address High bits to SRAM
ADDRH4  PIN ISTYPE 'REG,BUFFER'; " ADDRH : Address High bits to SRAM
ADDRH3  PIN ISTYPE 'REG,BUFFER'; " ADDRH : Address High bits to SRAM
ADDRH2  PIN ISTYPE 'REG,BUFFER'; " ADDRH : Address High bits to SRAM
ADDRH1  PIN ISTYPE 'REG,BUFFER'; " ADDRH : Address High bits to SRAM
ADDRH0  PIN ISTYPE 'REG,BUFFER'; " ADDRH : Address High bits to SRAM
ADDRL8  PIN ISTYPE 'REG,BUFFER'; " ADDRL : Address Low bits to SRAM
ADDRL7  PIN ISTYPE 'REG,BUFFER'; " ADDRL : Address Low bits to SRAM
ADDRL6  PIN ISTYPE 'REG,BUFFER'; " ADDRL : Address Low bits to SRAM
ADDRL5  PIN ISTYPE 'REG,BUFFER'; " ADDRL : Address Low bits to SRAM
ADDRL4  PIN ISTYPE 'REG,BUFFER'; " ADDRL : Address Low bits to SRAM
ADDRL3  PIN ISTYPE 'REG,BUFFER'; " ADDRL : Address Low bits to SRAM
ADDRL2  PIN ISTYPE 'REG,BUFFER'; " ADDRL : Address Low bits to SRAM
ADDRL1  PIN ISTYPE 'REG,BUFFER'; " ADDRL : Address Low bits to SRAM
ADDRL0  PIN ISTYPE 'REG,BUFFER'; " ADDRL : Address Low bits to SRAM
HB  PIN ISTYPE 'COM';  " HB : High byte enable to SRAM
LB  PIN ISTYPE 'COM';  " LB : Low byte enable to SRAM
// Nodes
WEINT  NODE ISTYPE 'COM';
// Bus
ADDRH = [ADDRH8..ADDRH0];
ADDRL = [ADDRL8..ADDRL0];
ZBUS  = [ZBUS8..ZBUS0];

EQUATIONS
ADDRH.CLK = !RAS;     "Stock first part of the address
ADDRH := ZBUS;
ADDRL.CLK = !CAS;     "Stock last part of the address
ADDRL := ZBUS;
HB = !WE1;
LB = !WE0;
WEINT = WE0 & WE1;
WE = WEINT;
OE = !(WEINT & !CAS)
END 



----- Message initial ----
De : "coco at yourdvd.net" <coco at yourdvd.net>
À : CoCoList for Color Computer Enthusiasts <coco at maltedmedia.com>
Envoyé le : vendredi 20 avril 2007, 14 h 02 min 46 s
Objet : Re: [Coco] Re : FREE Services For Members Of The CoCoList at Malted Media


could i see a copy of your circuit? are you latching on the falling
edges of ras and cas?

> -------- Original Message --------
> Subject: [Coco] Re : FREE Services For Members Of The CoCoList at
> Malted Media
> From: Sylvain Rousseau <surtoutnombliepas at yahoo.ca>
> Date: Fri, April 20, 2007 9:41 am
> To: CoCoList for Color Computer Enthusiasts <coco at maltedmedia.com>
> 
> I tried to made one myself (512k static ram for CoCo3) last winter but
> it don't works.


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