[Coco] Dynamic RAM Q

jdaggett at gate.net jdaggett at gate.net
Fri Oct 6 22:19:50 EDT 2006


On 7 Oct 2006 at 2:03, Phill Harvey-Smith wrote:

> Robert Gault wrote:
> > Phill Harvey-Smith wrote:
> >> <snip>
> >> One final curious thing about this setup is this, if I turn the 
> >> machine on, type a 2 line 10 Print "Phill was here "; 20 Goto 10 type 
> >> program, and run it, it runs. If I then turn the machine OFF for 5 
> >> seconds and then back on again, and type RUN it's still there !!!! I 
> >> have also noticed this on some CoCo 1/2 models too, so much for 
> >> Dynamic ram needing to be refreshed :) :) :)
> > 
> > Try that with a voltmeter on the +5v line. It would be interesting to 
> > know whether the power supply caps store enough energy to keep the RAM 
> > alive for several seconds.
> 
> Tried it, the voltage fell away to about half a volt in about a second, 
> so I don't think it's that. The odd thing is it doesn't do this with the 
> normal 4164 / 4116 chips in it, it's really odd, I'd be less surprised 
> if this where static RAM but it's defiantly dynamic, so should decay if 
> not being refreshed, even if the power is still on.
> 
> Cheers.
> 
> Phill.
***************

Phil 

The 4116/4164 are very old technology dram. These used three NMOS 
transistors and a cap to form a bit. The whole process was NMOS technology. 
Starting with about 256Kbit and higher density drams moved to CMOS process. 
Further improvements allowed the bit cell to evovled into using one transistor and 
a cap. This feature does allow lower voltage operation as well as data retention to 
lower voltages than that of the very old three transisor NMOS cells. 

Dpending on die process, it is not inconcievable that some dram chips could keep 
their charge long after their normal refresh period. In fact some CMOS low power 
chips actually had their refresh periods extended out to 64mS as opposed to the 4 
and 8mS refresh periods of lower density drams.  

james




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