[Coco] CUBIX on the CoCo?
jdaggett at gate.net
jdaggett at gate.net
Sun Oct 30 20:00:41 EST 2005
First off thanks for the info. I was not sure but is did seem that
keyboard and video driver were specific to the board and user. You
essentially confirmed my suspicion. As far as I know, the standard
basic roms in the Coco3 do not use the SWI interrupt. I know that
OS9 does. I did see your use of the SWI instruction and as of now
see no issue to it.
The area from $FE00 to $FEFF can be ROM or RAM in the Coco
3. Inside the GIME Chip is the INIT0 register located at $FF90. A
bit in that register controls whether that space is used for RAM or
ROM. In normal operation this is RAM. The vectors are mapped
into a jump table that is stored in the u pper part of this range. Other
variable are also store there that allows a 256 direct page for use by
programs or OS so that the upper 8K block can be either RAM or
ROM. There is a 132 byte scratch pad area in that range.
The Coco3 has a DAT MMU that allows the system to have two
tasks with independent memory maps. Total RAM is 512K. The
CPU will see it's normal 64K but any 8 8k blocks can be selected.
The video section of the GIME chip actually sees the whole 512K
The Keyboard sequence is a polled via a PIA (6821) that is mapped
at $FF00 - $FF03. When a key is pressed an IRQ is generated in
the PIA. The GIME chip also mirrors these addresses and can also
generate and IRQ.
The Coco3 is a far more complex hardware than the Coco1 or 2. I
would believe that a port of Cubix to one of those platforms would
be easier. There is a unique challenge to do this port on the Coco 3
as Boisy stated.
On 30 Oct 2005 at 6:41, Dave Dunfield wrote:
To: CoCoList for Color Computer Enthusiasts <coco at maltedmedia.com>
From: Dave Dunfield <dave04a at dunfield.com>
Subject: Re: [Coco] CUBIX on the CoCo?
Date sent: Sun, 30 Oct 2005 06:41:50 -0500
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> CUBIX needs to control at a minimum the SWI vector, which is located
> near the very top of memory (within the upper 512 bytes) - I assume
> the CoCo leaves RAM in the I/O space for the vector positions?
> Ideally it would have top level control over all of the vectors.
> I/O at FFxx would not be a problem. (What resides at FExx?)
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