[Coco] Re: "Historic" CD-i development systems...
james at skwirl.ca
Wed Mar 23 10:06:03 EST 2005
On Wed, 23 Mar 2005 KnudsenMJ at aol.com wrote:
> Now, since the 68K family used 2 clock phases per cycle, versus 4 or
> more for an Intel 80x86, is it still true that an N MHz Moto is
> comparable to a 2*N MHz Intel?
Not necessarily, although the 68040 doubled its internal clock speed, so
while it interacted with the bus at 33mhz, it ran internally at 66.
> I know this whole issue is part religion and part engineering, but
> what are the engineering facts these days? Yeah, a little OT, but....
It really depends on the architecture, and the part of the architecture
being used. Older processors, like 6809, only worked on one instruction at
a time. Modern processors can have dozens of instructions executing on the
processor at once, and once they get going can get multiple instructions
completing on the same cycle. They can even schedule instructions out of
order, if there are no data dependencies.
At this point, optimization becomes a very processor specific thing.
Certain operations on one processor might have entirely different
performance characteristics from the same operations on another processor.
While all PowerPC Macs support the core PowerPC instruction set, their
internal architectures are very different.
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