[Coco] [Color Computer] WordPak RS/CO80
jdaggett at gate.net
jdaggett at gate.net
Thu Jan 6 14:54:16 EST 2005
Boisy
>From the Synertek data sheet there are two means of accessing the video ram,
Shared and transparent.
In shared memory configuration, the CPU will have glue logic to keep the CPU
address lines from contending with the video display address lines. Basically the 14
address lines from the CRTC and the 14 address lines from the CPU are muxed
and the E clock controls the mux. Data is latched in from the CPU data buss on the
rising edge of the Eclock. May need some minor glue logic to prevent inadvertent
writes.
In transparent Mode the CPU write to the Update registers, R18 and R19, the 14 bit
address to be updated. Data is latched into a buffer and the RA4 line from the Chip
will activate say an OE from the latch to write to the ram on or after a delay from the
rising edge of the ECLOCK..
The key here is that when the ECLOCK is high that is the CPU's access time to the
video ram. When the E clock is low the CRTC chip reads from the video ram and
dioes refresh. Thisis how the GIME chip works and the 6847 Chip also.
My guess that the board is using transparent mode. Therefore you have one
address to write to the registers and perhaps a sequential address to write to the
data latch . The board probably has some glue logic to decode the address and with
the R/W* line store it in the 8 bit latch. The RA4 line of the CRTC will then load the
video ram at the address loaded in R18 and R19. In this manner the video ram does
not overlay onto the Coco3's ram and there is no contention. The key is knowing the
two addresses. Second is knowing that the card is fully functional.
Albeit slow it is a neat way in getting a higher resolutoin CRTC chip onto the Coco3.
For 80 column text this would not be to bad. For Graphics it is painfully slow.
james
On 6 Jan 2005 at 12:26, Boisy G. Pitre wrote:
From: "Boisy G. Pitre" <boisy at boisypitre.com>
Subject: Re: [Coco] [Color Computer] WordPak RS/CO80
Date sent: Thu, 6 Jan 2005 12:26:42 -0600
To: CoCoList for Color Computer Enthusiasts
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> James,
>
> Thanks for the information. It sheds some light, but I am still
> uncertain where I write the actual character. R18 and R19 tell the
> 6545 which way to set the address lines to the RAM, but now I need to
> know how to get the character into the RAM chip itself.
>
> Boisy
>
> On Jan 5, 2005, at 9:46 PM, jdaggett at gate.net wrote:
>
> > Boisy
> >
> > try this webpage
> >
> > http://www.6502.org/users/andre/petindex/crtctest/internals/diffs.ht
> > ml
> >
> > There is some minor differences between the MC6845, MC6845-1 and the
> > Rockwell 6545 and 6545-1 parts. One major difference between the
> > MC6845 and the Rockwell 6545 is bit #3 of R8. Setting this bit to
> > "1" will allow the CPU to access the video ram by writing to the
> > write only registers R18 and R19. When the E clock is low the MA0 to
> > MA13 address lines will be mapped to the video address address. When
> > the E clock is high the MA0 to MA 13 address lines will have the
> > address in R18 and R19. This only works on the Rockwell parts and
> > not the Motorola parts.
> >
> > james
> >
> >
> >
> > On 3 Jan 2005 at 19:12, Boisy Pitre wrote:
> >
> > From: Boisy Pitre <boisy at boisypitre.com>
> > Subject: Re: [Coco] [Color Computer] WordPak RS/CO80
> > Date sent: Mon, 3 Jan 2005 19:12:04 -0600
> > To: CoCoList for Color Computer Enthusiasts
> > <coco at maltedmedia.com>
> > Send reply to: CoCoList for Color Computer Enthusiasts
> > <coco at maltedmedia.com>
> > <mailto:coco-
> > request at maltedmedia.com?subject=unsubscribe>
> > <mailto:coco-
> > request at maltedmedia.com?subject=subscribe>
> >
> >>
> >> There is a 6116 (2Kx8) RAM chip onboard which connects to the 6545,
> >> as well as a 2K Character ROM.
> >>
> >> It appears that $FF78 and $FF79 are mirrored at $FF76 and $FF77.
> >> So now all that needs to be done is to solve the mystery of how to
> >> write characters to the internal RAM so that they are displayed on
> >> the screen.
> >
> >
> >
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> --
> Boisy G. Pitre
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>
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