[Coco] An interesting Question to the Software gurus

[Robert Gault]

jdaggett at gate.net wrote:
> All 
> 
> I have been pondering something about the GMIE chip the past few 
> days and have come to an interesting point. 
> 
> This is my understanding of how the Interrupts from the GIME chip 
> work.   
> 
> Bits #5 and #4 of $FF90 act as Global enable/disable. A one to 
> these bits allow the GIME chip to output an IRQ/FIRQ to the CPU. It 
> appears that $FF92 and $FF93 act as local IRQ enable/disable and 
> as status Flag. It seems that if you write $00 to $FF92 and $FF93 
> that will also do the same thing as writting a "0" to bits 5 and 4  of 
> $FF90. Here is my question and ponderance! If IRQ/FIRQ are 
> disabled by writing $00 to $FF92 and $FF93,  are the flags still set 
> when a peripheral device generates an IRQ/FIRQ? If so then this 
> should allow the peripheral device to be used in polled mode intead 
> of IRQ mode. Does OS9 or RSDOS  work in this mode?
> 
> 
> james
> 

If you don't want the CPU to respond to an IRQ/FIRQ but want an OS to 
respond, the normal thing to do is disable the CPU but enable the device 
IRQ. Under these conditions flags are set so polling is possible.

For the Coco3 in Coco3 mode, the analogous setting would be enable 
registers $FF92/93 which is done via $FF90 and then select the interrupt 
device via the values sent to $FF92/93. The CPU will only respond if 
regCC has interrupts enabled. If $FF92/93 are $00, then no device has 
been selected so it is neither possible nor logical to set a flag. What 
would the flag mean with no device selected?

Both Disk Basic and OS-9 work with the CPU enabled ANDCC #$AF. The type 
and manner of interrupts are either set via the GIME or the PIAs. Some 
programs that need very tight control may use polling but not these OS.