[Coco] Re: RESET on CoCo 1/2 vs CoCo 3

[KnudsenMJ at aol.com]

In a message dated 1/24/04 3:50:45 PM Eastern Standard Time, 
Torsten at Dittel.info writes:

> Ah, by the way, I already asked that some time ago and got some replies
>  (I guess I didn't understand them exactly because I don't remember the
>  reasons) whether it shouldn't be possible doing some kind of "DMA" if a
>  device from the bus can write data to RAM. I guess it's stupid, because
>  the CPU is halted while that SLENB* condition so you don't really win
>  using that method.

DMA wins if and only if you have a block of data to transfer, enough to make 
up the overhead of grabbing the bus and giving it back, and after the grab 
waiting about a dozen cycles to make sure the last 6809 instruction has finished. 
 Note that a dozen CPU cycles would only let the CPU itself move maybe 2 
bytes, so the break-even point isn't that many bytes.

But once your peripheral has the bus, it can blast data into/out of  RAM at 
the nearly 2 MHz rate that the CPU can.  Would really pay for a disk 
controller, maybe for a serial interface that buffered a few bytes.

Your DMA peripheral must have hardware to increment the address so as to 
steer the block of data, and hardware to count the number of bytes moved.  Failure 
in any of this hardware (or its programming by the device driver) will crash 
you good and hard.

Other than that, DMA is wonderful stuff, and should be used wherever 
performance matters.  --Mike K.