[Coco] GIME questions

David Gacke dgacke at ektarion.com
Mon Aug 16 12:34:50 EDT 2004


Hi Kevin,

I switched back to my CoCo 1 to keep testing. That is why I had posted
an email on the list yesterday about needing ROMs for a CoCo 1 with
extended Color Basic. 

Tim Lindner and Robert Gault helped me out there. Thanks again guys.

Anyway, what I've been doing for debugging is stepping thru the startup
code on a CoCo with my dsPIC and then comparing the results against the
same version of ROM in the MESS debugger. I'm looking for odd things
like condition code register flags not matching, and or other things
that don't jibe. Anyway, I'm finding little bugs here and there, nothing
major, but this one has me kind of stumped.

I'll keep debugging with my CoCo 1 till I come up with a solution, or at
least a plan on how to attack the problem.

Oh, and thanks for the kind words. I'll try and post some pics soon of
what this thing currently looks like.


Dave Gacke



-----Original Message-----
From: coco-bounces at maltedmedia.com [mailto:coco-bounces at maltedmedia.com]
On Behalf Of Kevin Diggs
Sent: Monday, August 16, 2004 11:14 AM
To: CoCoList for Color Computer Enthusiasts
Subject: Re: [Coco] GIME questions

David,

	Wouldn't it be simpler (and smarter) to do your testing
on a deuce instead? It is a simpler beast with less ... other stuff
to get in the way of your testing your cpu replacement. It is also
easier to replace (deuce to tre ratio on EBay is at least 3 to 1).

	Good luck with this project! This is a very innovative idea!

					kevin

Robert Gault wrote:
> David Gacke wrote:
> 
>> Hi Robert,
>>
>> Sorry it wasn't clear. So far, you are correct though.  I am stepping
>> thru the code with my dsPIC CPU that I'm coding, not a 6809 or 6309
and
>> am trying to figure out what I broke.
>>
>> To try and put it simply, by looking at that startup code, what would
>> make a shadow copy of what is located at C000 appear at 4000.
>>
>> Which GIME registers bits would I set if I wanted to do this
>> intentionally?
>>
>> I've stepped thru the code and am not finding a broken instruction. I
>> want to fully understand how to reproduce this intentionally, maybe
then
>> I can figure out what is going wrong.
>>
>> This one has me a little bit stumped, especially since I've never
really
>> done assembly on the CoCo (lots of other systems though), and I've
never
>> twiddled the bits on the GIME before.
>>
>> Thanks very much for the assistance.
>>
>> Dave
> 
>  ><snip>
> I think this will be what you want. I strongly advise you finding a
link 
> to this service data and more before trying to recreate the GIME chip.
> 
> The service manual defines the GIME INIT0 register at $FF90 as follows
> bit #    name            function
> 7        COCO            1= Coco 1& 2 compatible
> 6        M/P             1= MMU enabled
> 5        IEN             1= Chip IRQ enabled
> 4        FEN             1= Chip FIRQ enabled
> 3        MC3             1= DRAM at XFEXX constant
> 2        MC2             1= standard SCS  (ie. disk)
> 1        MC1             ROM map
> 0        MC0             ROM map
> 
> MC1   MC0           Mapping
> 0      x             16K Internal, 16K External
> 1      0             32K Internal
> 1      1             32K External except for vectors
> 
> 


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