[Coco] NitrOS-9 newbie needs some help

[Robert Gault]

jdaggett at gate.net wrote:

> Boise
> 
> One thing that comes to mind after reading what you posted and 
> looking at the Coco3 schematics,  I wonder if the real problem is 
> load capacitance and impeadance. 
> 
> The E and Q clocks from the GIME chip have a series 47 Ohm and 
> a 30 pF shunt cap. This forms a low pass filter to remove some of 
> the harmonic contents of the clock signals and rou nds the edges 
> off. Now when you place three or four cards in the MPI and if the 
> MPI does not buffer the clock lines, well  now we can have some 
> issues with the load impedance on the clock signals and some 
> skewing of the two to cause some timing issues. 
> 
> Four LSTTL loads will be about 500 Ohms and and another 30 to 50 
> pF capacitance on the clock signals from the GIME chip. Now you 
> start to get to a marginal point to where critical timing issues can be 
> affected. Swapping cards generally means that you are altering the 
> load impedance by plugging in a card that has a slightly higher 
> impedance and thus works. 
> 
> Some cards use both the E and the Q and some on ly the E clock. 
> IF you load the E clock to much and the variation between rise and 
> fall times of the E and Q clock differ signifiacantly,then the CPU 
> may not operate properly or certain peripheral devices will not 
> either. 
> 
> It is sounding to me that the GIME chip may have a drive issue on 
> the E and Q clock and that putting to many loads on the E and the 
> Q clock lines is becoming a problem. 
> 
> james 
 ><snip>

If this were true you ought to be able to see a deformed clock pulse 
using an oscilloscope. Have you or anyone else examined the clock lines 
  under the conditions described above?